Техническая Спецификация для STMicroelectronics Evaluation board for A5970AD EVALA5970AD EVALA5970AD

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DocID14661 Rev 5
8.8 Synchronization 
example
 for details.
Figure 24. Synchronization example
8.9 Compensation 
network 
with MLCC at the output
MLCCs (multiple layer ceramic capacitor) with values in the range of 10 µF - 22 µF and 
rated voltages in the range of 10 V - 25 V are available today at relatively low cost from 
many manufacturers.
These capacitors have very low ESR values (a few m
) and thus are occasionally used for 
the output filter in order to reduce the voltage ripple and the overall size of the application. 
However, a very low ESR value affects the compensation of the loop (see 
) and in order to keep the system stable, a more complicated compensation network may 
be required. However, due to the architecture of the internal error amplifier the bandwidth 
with this compensation is limited. 
That is why output capacitors with a not negligible ESR are suggested. The selection of the 
output capacitor have to guarantee that the zero introduced by this component is inside the 
designed system bandwidth and close to the frequency of the double pole introduced by the 
LC filter. A general rule for the selection of this compound for the system stability is provided 
in 
Equation 41
A5970AD
A5970AD
f
Z ESR
1
2
 ESR C
OUT
 
------------------------------------------------
=
bandwidth
f
LC
f
Z ESR
10 f
LC