Инструкции для STMicroelectronics Evaluation board for A5970AD EVALA5970AD

Содержание

• Figure 1. Application schematic

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• 1 Pin settings

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  • 1.1 Pin connection

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    • Figure 2. Pin connection (top view)

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  • 1.2 Pin description

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    • Table 1. Pin description

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• 2 Electrical data

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  • 2.1 Maximum ratings

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    • Table 2. Absolute maximum ratings

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  • 2.2 Thermal data

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    • Table 3. Thermal data

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• 3 Electrical characteristics

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  • Table 4. Electrical characteristics

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• 4 Datasheet parameters over the temperature range

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• 5 Functional description

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  • Figure 3. Block diagram

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  • 5.1 Power supply and voltage reference

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  • 5.2 Voltages monitor

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    • Figure 4. Internal circuit

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  • 5.3 Oscillator and synchronization

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    • Figure 5. Oscillator circuit block diagram

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    • Figure 6. Synchronization example

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  • 5.4 Current protection

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    • Figure 7. Current limitation circuitry

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  • 5.5 Error amplifier

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    • Table 5. Uncompensated error amplifier characteristics

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  • 5.6 PWM comparator and power stage

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    • Figure 8. Driving circuitry

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  • 5.7 Inhibit function

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  • 5.8 Thermal shutdown

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• 6 Additional features and protection

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  • 6.1 Feedback disconnection

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  • 6.2 Output overvoltage protection

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  • 6.3 Zero load

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• 7 Closing the loop

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  • Figure 9. Block diagram of the loop

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  • 7.1 Error amplifier and compensation network

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    • Figure 10. Error amplifier equivalent circuit and compensation network

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  • 7.2 LC filter

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  • 7.3 PWM comparator

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    • Figure 11. Module plot

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    • Figure 12. Phase plot

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• 8 Application information

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  • 8.1 Component selection

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    • Table 6. List of ceramic capacitors for the A5970AD

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    • Table 7. Output capacitor selection

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    • Table 8. Inductor selection

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  • 8.2 Layout considerations

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    • Figure 13. Layout example

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  • 8.3 Thermal considerations

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    • Figure 14. Switching losses

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  • 8.4 Short-circuit protection

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    • Figure 15. Short-circuit current VIN = 12 V

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    • Figure 16. Short-circuit current VIN = 24 V

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    • Figure 17. Short-circuit current VIN = 36 V

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  • 8.5 Application circuit

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    • Figure 18. Evaluation board application circuit

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    • Table 9. Component list

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    • Figure 19. PCB layout (component side)

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    • Figure 20. PCB layout (bottom side)

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    • Figure 21. PCB layout (front side)

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  • 8.6 Positive buck-boost regulator

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    • Figure 22. Positive buck-boost regulator

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  • 8.7 Negative buck-boost regulator

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    • Figure 23. Negative buck-boost regulator

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  • 8.8 Synchronization example

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    • Figure 24. Synchronization example

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  • 8.9 Compensation network with MLCC at the output

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    • Figure 25. MLCC compensation network example

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  • 8.10 External SOFT_START network

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    • Figure 26. Soft-start network example

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• 9 Typical characteristics

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  • Figure 27. Load regulation

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  • Figure 28. Line regulation

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  • Figure 29. Output voltage vs. junction temperature

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  • Figure 30. Shutdown current vs. junction temperature

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  • Figure 31. Junction temperature vs. output current - VIN = 12 V

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  • Figure 32. Junction temperature vs. output current - VIN = 5 V

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  • Figure 33. Efficiency vs output current - VIN = 12 V

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  • Figure 34. Efficiency vs output current - VIN = 5 V

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• 10 Package information

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  • Figure 35. SO-8 package outline

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  • Table 10. SO-8 package mechanical data

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• 11 Ordering information

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  • Table 11. Ordering information

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• 12 Revision history

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  • Table 12. Document revision history

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