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5.7
Block n Enable Register (BLKn_EN)
SRIO Registers
There are nine of these registers, one for each of nine logical blocks in the peripheral.
Figure 63. Block n Enable Register (BLKn_EN)
31-16
Reserved
R-0x00
LEGEND: R = Read only; -n = value after reset
15-1
0
Reserved
EN
R-0x00
RW-
Undefi
ned
LEGEND: R = Read only; -n = value after reset
Table 34. Block n Enable Register (BLKn_EN) Field Descriptions
Bit
Field
Value
Description
31-1
Reserved
Reserved
0
EN
Controls reset to nth (0 to 8) clock/logical domain.
0
Logical block n disabled (held in reset, clocks disabled)
1
Logical block n enabled
Serial RapidIO (SRIO)
106
SPRU976 – March 2006