Справочник Пользователя для National Instruments Welding System 321645c-01
Chapter 2
Function Reference — DIG_Block_PG_Config
NI-DAQ FRM for PC Compatibles
2-156
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National Instruments Corporation
DIG_Block_PG_Config
enables or disabled the pattern generation mode of digital I/O. If
the config parameter equals 1 or 2, any subsequent
DIG_Block_In
or
DIG_Block_Out
call
initiates a pattern generation operation. Pattern generation mode overrides any two-way
handshaking mode set by the
handshaking mode set by the
DIG_Grp_Mode
function.
The primary difference between pattern generation and two-way handshaking is that in
pattern generation timing information travels in only one direction, over the REQ line. The
board can generate request signals at regularly clocked intervals (internal mode), or you
provide request signals to the board (external mode), or the board generates request signals
whenever the input data changes (change detection). Either there is no return handshake on
the ACK line (DIO 6533), or the return handshake can be ignored (DIO-32F).
pattern generation timing information travels in only one direction, over the REQ line. The
board can generate request signals at regularly clocked intervals (internal mode), or you
provide request signals to the board (external mode), or the board generates request signals
whenever the input data changes (change detection). Either there is no return handshake on
the ACK line (DIO 6533), or the return handshake can be ignored (DIO-32F).
On the DIO 6533, pattern generation mode enables some additional features:
•
You can enable start and stop triggers using
DIG_Trigger_Config
.
•
NI-DAQ monitors the transfer speed, and the
DIG_Block_Check
function returns an
error message if the system is unable to keep up with the programmed transfer rate
(internal requests) or the rate of request pulses (external requests or pattern generation).
(internal requests) or the rate of request pulses (external requests or pattern generation).
Only the DIO 6533 boards support change detection. In this mode, the board generates an
internal request any time it detects activity on the group's significant input lines. As long as
the rate of change is within the board's change-detection limits, the board captures exactly one
copy of each new input pattern.
internal request any time it detects activity on the group's significant input lines. As long as
the rate of change is within the board's change-detection limits, the board captures exactly one
copy of each new input pattern.
If you set a pattern mask for change detection, you can select a subset of the group's input
lines to be significant. However, when the board detects a change, it acquires data from all
of the group's input lines, whether masked or not.
lines to be significant. However, when the board detects a change, it acquires data from all
of the group's input lines, whether masked or not.
Using change detection mode in conjunction with the
Configure_DAQ_Event_Message
function, you can also receive a message every time the input data changes. Use the
Configure_DAQ_Event_Message
function to generate a message after each pattern is
acquired. To ensure best precision in messaging, use the interrupt-driven data transfer
method. Otherwise, messages might be delayed. You can use the
method. Otherwise, messages might be delayed. You can use the
Set_DAQ_Device_Info
function to select a transfer method.
On the DIO-32F, the advantage of using double-buffered output is that the variability in
update intervals is reduced to an absolute minimum, producing the highest quality output at
high update rates. The disadvantage is that the first ACK pulse produced by the device is not
preceded by the first pattern. Instead, the second ACK pulse signals the generation of the first
pattern. Also, the last pattern generated is not followed by an ACK pulse. The advantage of
single-buffered output is the elimination of these ACK pulse irregularities. The first ACK
pulse signals generation of the first pattern and the last pattern is followed by a final ACK
pulse. The disadvantage of single-buffered output is that at high update rates, variations in
DMA bus arbitration times can increase the variability in update intervals, reducing the
overall quality of the digital patterns.
update intervals is reduced to an absolute minimum, producing the highest quality output at
high update rates. The disadvantage is that the first ACK pulse produced by the device is not
preceded by the first pattern. Instead, the second ACK pulse signals the generation of the first
pattern. Also, the last pattern generated is not followed by an ACK pulse. The advantage of
single-buffered output is the elimination of these ACK pulse irregularities. The first ACK
pulse signals generation of the first pattern and the last pattern is followed by a final ACK
pulse. The disadvantage of single-buffered output is that at high update rates, variations in
DMA bus arbitration times can increase the variability in update intervals, reducing the
overall quality of the digital patterns.