Справочник Пользователя для Mitsubishi Electronics FX2NC
FX Series Programmable Controlers
Applied Instructions 5
5-30
5.3.7
WAND (FNC 26)
Operation:
The bit patterns of the two source devices are
analyzed (the contents of S
analyzed (the contents of S
2
is compared against
the contents of S
1
). The result of the logical AND
analysis is stored in the destination device (D).
The following rules are used to determine the result of a logical AND operation. This takes
place for every bit contained within the source devices:
General rule: (S
place for every bit contained within the source devices:
General rule: (S
1
) Bit n WAND (S
2
) Bit n = (D) Bit n
1 WAND 1 = 1
0 WAND 1 = 0
1 WAND 0 = 0
0 WAND 0 = 0
5.3.8
WOR (FNC 27)
Operation:
The bit patterns of the two source devices are
analyzed (the contents of S
analyzed (the contents of S
2
is compared against
the contents of S
1
). The result of the logical OR
analysis is stored in the destination device (D).
The following rules are used to determine the result of a logical OR operation. This takes place
for every bit contained within the source devices:
General rule: (S
for every bit contained within the source devices:
General rule: (S
1
) Bit n WOR (S
2
) Bit n = (D) Bit n
1 WOR 1 = 1
0 WOR 1 = 1
1 WOR 0 = 1
0 WOR 0 = 0
Mnemonic
Function
Operands
Program steps
S1
S2
D
WAND
FNC 26
(
FNC 26
(
Logical
word AND)
A logical AND is
performed on the
source devices -
result stored at
destination
performed on the
source devices -
result stored at
destination
K, H,
KnX, KnY,
KnM, KnS,
T, C, D, V, Z
KnX, KnY,
KnM, KnS,
T, C, D, V, Z
KnY, KnM, KnS,
T, C, D, V, Z
T, C, D, V, Z
WAND,WANDP:
7 steps
DAND,
DANDP:
13 steps
7 steps
DAND,
DANDP:
13 steps
Mnemonic
Function
Operands
Program steps
S1
S2
D
WOR
FNC 27
(
FNC 27
(
Logical
word OR)
A logical OR is
performed on the
source devices -
result stored at
destination
performed on the
source devices -
result stored at
destination
K,H,
KnX,KnY, KnM, KnS,
T, C, D, V, Z
KnX,KnY, KnM, KnS,
T, C, D, V, Z
KnY, KnM, KnS,
T, C, D, V, Z
T, C, D, V, Z
WOR,WORP:
7 steps
DOR,
DORP:
13 steps
7 steps
DOR,
DORP:
13 steps
FX
0(S)
FX
0N
FX FX
(2C)
FX
2N(C)
FX
(2C)
FX
FX
2N(C)
FX
0N
FX
0(s)
PULSE-P
FX
(2C)
FX
FX
2N(C)
FX
0N
FX
0(s)
16 BIT OPERATION
FX
FX
0N
FX
0(s)
FX
(2C)
FX
2N(C)
32 BIT OPERATION
X0
WAND D 10 D 12 D 14
[ S1 ]
[ D ]
[ S2 ]
FX
0(S)
FX
0N
FX FX
(2C)
FX
2N(C)
FX
(2C)
FX
FX
2N(C)
FX
0N
FX
0(s)
PULSE-P
FX
(2C)
FX
FX
2N(C)
FX
0N
FX
0(s)
16 BIT OPERATION
FX
FX
0N
FX
0(s)
FX
(2C)
FX
2N(C)
32 BIT OPERATION
X1
WOR D 10 D 12 D 14
[ S1 ]
[ D ]
[ S2 ]