Справочник Пользователя для Mitsubishi Electronics FX
FX Series Programmable Controlers
Applied Instructions 5
5-37
5.4.5
SFTR (FNC 34)
Operation:
The instruction copies n
2
source devices to a bit
stack of length n
1
. For every new addition of n
2
bits,
the existing data within the bit stack is shifted n
2
bits
to the right. Any bit data moving to a position
exceeding the n
exceeding the n
1
limit is diverted to an overflow area.
The bit shifting operation will occur every time the
instruction is processed unless it is modified with
either the pulse suffix or a controlled interlock.
instruction is processed unless it is modified with
either the pulse suffix or a controlled interlock.
5.4.6
SFTL (FNC 35)
Operation:
The instruction copies n
2
source devices to a bit
stack of length n
1
. For every new addition of n
2
bits,
the existing data within the bit stack is shifted n
2
bits
t o t h e le ft . A n y b i t d a t a m o v i ng to a p os i ti on
exceeding the n
exceeding the n
1
limit is diverted to an overflow area.
The bit shifting operation will occur every time the
instruction is processed unless it is modified with
either the pulse suffix or a controlled interlock.
instruction is processed unless it is modified with
either the pulse suffix or a controlled interlock.
Mnemonic
Function
Operands
Program steps
S
D
n
1
n
2
SFTR
FNC 34
(
FNC 34
(
Bit shift
right)
The status of the
source devices are
copied to a
controlled bit stack
moving the existing
data to the right
source devices are
copied to a
controlled bit stack
moving the existing
data to the right
X, Y, M, S
Y, M, S
K,H,
Note:
FX users:
n
FX users:
n
2
≤
n
1
≤
1024
FX
0
,FX
0N
users:
n
2
≤
n
1
≤
512
SFTR,SFTRP:
9 steps
9 steps
Mnemonic
Function
Operands
Program steps
S
D
n
1
n
2
SFTL
FNC 35
(
FNC 35
(
Bit shift
left)
The status of the
source devices are
copied to a
controlled bit stack
moving the existing
data to the left
source devices are
copied to a
controlled bit stack
moving the existing
data to the left
X, Y, M, S Y, M, S
K,H,
Note:
FX users: n
FX users: n
2
≤
n
1
≤
1024
FX
0
,FX
0N
users:
n
2
≤
n
1
≤
512
SFTL,SFTLP:
9steps
9steps
FX
0(S)
FX
0N
FX FX
(2C)
FX
2N(C)
FX
(2C)
FX
FX
2N(C)
FX
0N
FX
0(s)
PULSE-P
FX
(2C)
FX
FX
2N(C)
FX
0N
FX
0(s)
16 BIT OPERATION
FX
FX
0N
FX
0(s)
FX
(2C)
FX
2N(C)
32 BIT OPERATION
X6
SFTR X 0 M 0 K 16 K 4
[S] [D] [n1] [n2]
X3 X2 X1 X0
M15 M14 M13M12
M11 M10 M9 M8
M7 M6 M5 M4
M3 M2 M1 M0
FX
0(S)
FX
0N
FX FX
(2C)
FX
2N(C)
FX
(2C)
FX
FX
2N(C)
FX
0N
FX
0(s)
PULSE-P
FX
(2C)
FX
FX
2N(C)
FX
0N
FX
0(s)
16 BIT OPERATION
FX
FX
0N
FX
0(s)
FX
(2C)
FX
2N(C)
32 BIT OPERATION
X7
SFTL X 10 Y 0 K 12 K 3
[S] [D] [n1] [n2]
Y2 Y1 Y0
X12 X11 X10
Y5 Y4 Y3
Y10 Y7 Y6
Y13 Y12 Y11