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FX Series Programmable Controlers
Applied Instructions 5
5-53
5.6.1
REF (FNC 50)
Operation:
Standard PLC operation processes output and input
status between the END instruction of one program
scan and step 0 of the following program scan. If an
immediate update of the I/O device status is required
the REF instruction is used. The REF instruction can only be used to update or refresh blocks of
8 (n) consecutive devices. The head address of the refreshed devices should always have its
last digit as a 0 (zero), i.e. in units of 10.
5.6.2
REFF (FNC 51)
Operation:
PLC’s are provided with input filters to overcome
problems generated by mechanical switch gear.
However, as this involves ensuring a steady input
signal is received for a fixed time duration, the use of
input filters slows down the PLC response times. For high speed applications, especially where
solid state switching provides the input signal, input filter times may be reduced. The default
setting for the input filters is approximately 10 msec. Using this instruction input filter times of 0
to 60 msec may be selected. The setting ‘0’ (zero) is actually 50 
µ
sec. This is the minimum
available setting. It is automatically selected when direct input, interrupts or high speed counting
functions are used. The REFF instruction needs to be driven for each program scan if it is to be
effective, otherwise, the standard 10 msec filter time is used.
Mnemonic
Function 
Operands
Program steps
D
n
REF
FNC 50
(
Refresh)
å
Forces an
immediate update
of inputs or
outputs as
specified
X, Y
Note:
D should always be a
multiple of 10, i.e. 00,
10, 20, 30 etc.
K, H
Note:
n should always be a
multiple of 8, i.e. 8, 16,
24, 32 etc.
REF, REFP:
5 steps
Mnemonic
Function 
Operands
Program steps
n
REFF
FNC 51
(Refresh
and filter
adjust)
Inputs are
refreshed, and
their input filters
are reset to the
newly designated
value
K, H,
Note: n= 0 to 60 msec (0 = 50
µ
s)
X000 to X007 (X000 to X017 for FX
2N
) are
automatically designated when using this
instruction
REFF,
REFFP:
3 steps
FX
0(S)
FX
0N
FX FX
(2C)
FX
2N(C)
FX
(2C)
FX
FX
2N(C)
FX
0N
FX
0(s)
PULSE-P
FX
(2C)
FX
FX
2N(C)
FX
0N
FX
0(s)
16 BIT OPERATION
FX
FX
0N
FX
0(s)
FX
(2C)
FX
2N(C)
32 BIT OPERATION
X0
X 10
[ D ]
K 8
REF
[ n ]
Note: A short delay will occur before the I/O device is physically updated, in the case of inputs
a time equivalent to the filter setting, while outputs will delay for their set energized time.
FX
0(S)
FX
0N
FX FX
(2C)
FX
2N(C)
FX
(2C)
FX
FX
2N(C)
FX
0N
FX
0(s)
PULSE-P
FX
(2C)
FX
FX
2N(C)
FX
0N
FX
0(s)
16 BIT OPERATION
FX
FX
0N
FX
0(s)
FX
(2C)
FX
2N(C)
32 BIT OPERATION
X10
K 1
REFF
[ n ]