Справочник Пользователя для Motorola MC68HC908MR16
Advance Information
MC68HC908MR16/MC68HC908MR32 — Rev. 4.0
242
Timer Interface B (TIMB)
MOTOROLA
Timer Interface B (TIMB)
12.8.4 TIMB Channel Status and Control Registers
Each of the TIMB channel status and control registers:
•
Flags input captures and output compares
•
Enables input capture and output compare interrupts
•
Selects input capture, output compare, or PWM operation
•
Selects high, low, or toggling output on output compare
•
Selects rising edge, falling edge, or any edge as the active input
capture trigger
capture trigger
•
Selects output toggling on TIMB overflow
•
Selects 100 percent PWM duty cycle
•
Selects buffered or unbuffered output compare/PWM operation
CHxF — Channel x Flag
When channel x is an input capture channel, this read/write bit is set
when an active edge occurs on the channel x pin. When channel x is
an output compare channel, CHxF is set when the value in the TIMB
counter registers matches the value in the TIMB channel x registers.
when an active edge occurs on the channel x pin. When channel x is
an output compare channel, CHxF is set when the value in the TIMB
counter registers matches the value in the TIMB channel x registers.
Register Name and Address: TBSC0 — $0056
Bit 7
6
5
4
3
2
1
Bit 0
Read:
CH0F
CH0IE
MS0B
MS0A
ELS0B
ELS0A
TOV0
CH0MAX
Write:
0
Reset:
0
0
0
0
0
0
0
0
Register Name and Address: TBSC1 — $0059
Bit 7
6
5
4
3
2
1
Bit 0
Read:
CH1F
CH1IE
0
MS1A
ELS1B
ELS1A
TOV1
CH1MAX
Write:
0
R
Reset:
0
0
0
0
0
0
0
0
R
= Reserved
Figure 12-7. TIMB Channel Status
and Control Registers (TBSC0–TBSC1)