Справочник Пользователя для Motorola MC68HC908MR16
Advance Information
MC68HC908MR16/MC68HC908MR32 — Rev. 4.0
346
Analog-to-Digital Converter (ADC)
MOTOROLA
Analog-to-Digital Converter (ADC)
compatibility with 8-bit ADC designs are required. No interlocking
between ADRH and ADRL is present.
between ADRH and ADRL is present.
NOTE:
Quantization error is affected when only the most significant eight bits
are used as a result. See
are used as a result. See
Figure 19-2. 8-Bit Truncation Mode Error
19.4.6 Monotonicity
The conversion process is monotonic and has no missing codes.
19.5 Interrupts
When the AIEN bit is set, the ADC module is capable of generating a
CPU interrupt after each ADC conversion. A CPU interrupt is generated
if the COCO bit is at logic 0. The COCO bit is not used as a conversion
complete flag when interrupts are enabled.
CPU interrupt after each ADC conversion. A CPU interrupt is generated
if the COCO bit is at logic 0. The COCO bit is not used as a conversion
complete flag when interrupts are enabled.
IDEAL 10-BIT CHARACTERISTIC
WITH QUANTIZATION =
WITH QUANTIZATION =
±
1/2
IDEAL 8-BIT CHARACTERISTIC
WITH QUANTIZATION =
WITH QUANTIZATION =
±
1/2
10-BIT TRUNCATED
TO 8-BIT RESULT
TO 8-BIT RESULT
WHEN TRUNCATION IS USED,
ERROR FROM IDEAL 8-BIT = 3/8 LSB
DUE TO NON-IDEAL QUANTIZATION.
ERROR FROM IDEAL 8-BIT = 3/8 LSB
DUE TO NON-IDEAL QUANTIZATION.
000
001
002
003
004
005
006
007
008
009
00A
00B
000
001
002
003
8-BIT
RESULT
10-BIT
RESULT
I
NPUT VOLTAGE
REPRESENTED AS 10-BIT
INPUT VOLTAGE
REPRESENTED AS 8-BIT
INPUT VOLTAGE
REPRESENTED AS 8-BIT
1/2
2 1/2
4 1/2
6 1/2
8 1/2
1 1/2
3 1/2
5 1/2
7 1/2
9 1/2
1/2
2 1/2
1 1/2