Motorola DSP96002 用户手册
MOTOROLA
DSP96002 USER’S MANUAL
4 - 1
SECTION 4
SOFTWARE ARCHITECTURE
4.1
PROGRAMMING MODEL
The programmer can view the DSP96002 architecture as three execution units operating in parallel. The
three execution units are the
•
Data ALU
•
Address Generation Unit
•
Program Controller
The DSP96002 instruction set has been designed to allow flexible control of these parallel processing re-
sources. Many instructions allow the programmer to keep each unit busy, thus enhancing program execu-
tion speed. The programming model is shown in Figure 4-1 and Figure 4-2, and is described in the following
sections.
Program Controller* - Reserved bits: always read as zero, should be written with zero for future compatibil-
ity.
Figure 4-1. DSP96002 Programming Model - Program Controller
PC
MR
ER
IER
CCR
*
OMR
LA
LC
SP
*
15
1
31
5
0
31
0
31
0
31
0
31
0
31
0
23
15
7
7
31
0
0 31
SYSTEM STACK
(SS)