用户手册 — Motorola DSP96002

目录

• DSP96002 INTRODUCTION

  2
• SIGNAL DESCRIPTION AND BUS OPERATION

  4
• CHIP ARCHITECTURE

  24
• SOFTWARE ARCHITECTURE

  40
• DATA ORGANIZATION AND ADDRESSING MODES

  54
• INSTRUCTION SET AND EXECUTION

  77
• EXPANSION PORTS AND I/O PERIPHERALS

  87
• EXCEPTION PROCESSING

  141
• OPERATING MODES AND PROGRAM MEMORY MAPS

  157
• ON-CHIP EMULATOR

  167
• INSTRUCTION SET DETAILS

  189
• STANDARD DSP BENCHMARKS

  520
• IEEE ARITHMETIC

  724
• FLOATING-POINT NUMBER STORAGE AND ARITHMETIC

  753
• INSTRUCTION CACHE and 32-BIT TIMER/EVENT COUNTER

  783
• ADDENDUM/CORRECTIONS

  872
• Index

  890
  • — A—

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  • — C—

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  • — D—

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  • — E—

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  • — F—

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  • — G—

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  • — H—

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  • — I—

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  • — J—

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  • — L—

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  • — M—

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  • — N—

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  • — O—

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  • — P—

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  • — R—

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  • — S—

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  • — T—

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  • — V—

    895
  • — W—

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  • — X—

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  • — Y—

    895