Intel N475 AU80610006240AA 用户手册
产品代码
AU80610006240AA
Datasheet
21
Signal Description
2.5
PLL Signals
2.6
Analog Display Signals
Table 2-8. PLL Signals
Signal Name
Description
Direction
Type
BCLKP[0]
BCLKN[0]
BCLKN[0]
Differential Core Clock In
I
Diff Clk CMOS
HPL_CLKINP
HPL_CLKINN
HPL_CLKINN
Differential Host Clock In
I
Diff Clk CMOS
EXP_CLKINP
EXP_CLKINN
EXP_CLKINN
Differential DMI Clock In
I
Diff Clk CMOS
REFCLKINN
REFCLKINP
REFCLKINP
Differential PLL Clock In
I
Diff Clk CMOS
REFSSCLKINN
REFSSCLKINP
REFSSCLKINP
Differential Spread Spectrum Clock In
I
Diff Clk CMOS
Table 2-9. Analog Display Signals
Signal Name
Description Direction
Type
CRT_RED
RED Analog Video Output: This signal is a CRT
analog video output from the internal color palette
DAC.
analog video output from the internal color palette
DAC.
O
Analog
CRT_GREEN
GREEN Analog Video Output: This signal is a CRT
analog video output from the internal color palette
DAC.
analog video output from the internal color palette
DAC.
O
Analog
CRT_BLUE
BLUE Analog Video Output: This signal is a CRT
analog video output from the internal color palette
DAC.
analog video output from the internal color palette
DAC.
O
Analog
CRT_IRTN
Current return path. Shorted to ground
O
Analog
DAC_IREF
Resistor Set: Set point resistor for the internal
color palette DAC. A 665-Ohm ±1% resistor is
required between DAC_IREF and motherboard
ground.
color palette DAC. A 665-Ohm ±1% resistor is
required between DAC_IREF and motherboard
ground.
I/O
Analog
CRT_HSYNC
CRT Horizontal Synchronization: This signal is
used as the vertical sync (polarity is programmable)
or “sync interval”. 3.3-V output.
used as the vertical sync (polarity is programmable)
or “sync interval”. 3.3-V output.
O
HVCMOS
CRT_VSYNC
CRT Vertical Synchronization: This signal is used
as the vertical sync (polarity is programmable). 3.3-
V output.
as the vertical sync (polarity is programmable). 3.3-
V output.
O
HVCMOS
CRT_DDC_CLK
CRT DDC Clock for monitor control
I/O
COD
CRT_DDC_DATA
CRT DDC Data for monitor control
I/O
COD