Excalibur electronic A-MNL-NIOSPROG-01.1 用户手册
90
Altera Corporation
32-Bit Instruction Set
ST
Store 32-bit Data To Memory
Operation:
Not preceded by PFX:
Mem32[align32(RB)]
← RA
Preceded by PFX:
Mem32[align32(RB + (
σ(K) × 4))] ← RA
Assembler Syntax:
ST [%rB],%rA
Example:
Not preceded by PFX:
ST [%g0],%i3 ; %g0 is pointer, %i3 stored
Preceded by PFX:
PFX 3 ; word offset
ST [%g0],%i3 ; store to location %g0 + 12
Description:
Not preceded by PFX:
Stores the 32-bit data value in RA to memory. Data is always written to a word-
Stores the 32-bit data value in RA to memory. Data is always written to a word-
aligned address given by bits 31..2 of RB (the two LSBs of RB are ignored).
Preceded by PFX:
Preceded by PFX:
The value in K is sign-extended and used as a word-scaled, signed offset. This
offset is added to the base-pointer address RB (bits 1..0 ignored), and data is
offset is added to the base-pointer address RB (bits 1..0 ignored), and data is
written to the resulting word-aligned address.
Condition Codes:
Flags: Unaffected
Instruction Format:
RR
Instruction Fields
A = Register index of operand RA
B = Register index of operand RB
B = Register index of operand RB
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
0
1
0
1
1
1
B
A
N
V
Z
C
−
−
−
−