Philips S1D13505 用户手册
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Epson Research and Development
Vancouver Design Center
S1D13505
Programming Notes and Examples
X23A-G-003-07
Issue Date: 01/02/05
2 Initialization
This section describes how to initialize the S1D13505. Sample code for performing
initialization of the S1D13505 is provided in the file init13505.c which is available on the
internet at http://www.eea.epson.com.
initialization of the S1D13505 is provided in the file init13505.c which is available on the
internet at http://www.eea.epson.com.
S1D13505 initialization can be broken into three steps. First, enable the S1D13505
controller (if necessary identify the specific controller). Next, set all the registers to their
initial values. Finally, program the Look-Up Table (LUT) with color values. This section
does not deal with programming the LUT, see Section 4 of this manual for LUT
programming details.
controller (if necessary identify the specific controller). Next, set all the registers to their
initial values. Finally, program the Look-Up Table (LUT) with color values. This section
does not deal with programming the LUT, see Section 4 of this manual for LUT
programming details.
Note
When using an ISA evaluation board in a PC (i.e. S5U13505B00C), there are two addi-
tional steps that must be carried out before initialization. First, confirm that 16-bit mode
is enabled by writing to address F80000h. Then, if hardware suspend is enabled, disable
suspend mode by writing to F00000h. For further information on ISA evaluation boards
refer to the S5U13505B00C Rev. 1.0 ISA Bus Evaluation Board User Manual, document
number X23A-G-004-xx.
tional steps that must be carried out before initialization. First, confirm that 16-bit mode
is enabled by writing to address F80000h. Then, if hardware suspend is enabled, disable
suspend mode by writing to F00000h. For further information on ISA evaluation boards
refer to the S5U13505B00C Rev. 1.0 ISA Bus Evaluation Board User Manual, document
number X23A-G-004-xx.
The following table represents the sequence and values written to the S1D13505 registers
to control a configuration with these specifications:
to control a configuration with these specifications:
• 640x480 color dual passive format 1 LCD @ 75Hz.
• 8-bit data interface.
• 8 bit-per-pixel (bpp) - 256 colors.
• 31.5 MHz input clock.
• 50 ns EDO-DRAM, 2 CAS, 4 ms refresh, CAS before RAS.
Table 2-1: S1D13505 Initialization Sequence
Register
Value
Notes
See Also
[1B]
0000 0000
Enable the host interface
[23]
1000 0000
Disable the FIFO
[01]
0011 0000
Memory configuration
- divide ClkI by 512 to get 4 ms for 256 refresh cycles
- this is 2-CAS# EDO memory
- divide ClkI by 512 to get 4 ms for 256 refresh cycles
- this is 2-CAS# EDO memory
[22]
0100 1000
Performance Enhancement 0 - refer to the hardware
specification for a complete description of these bits
specification for a complete description of these bits
S1D13505 Hardware
Functional Specification,
document number
X23A-A-001-xx
Functional Specification,
document number
X23A-A-001-xx
[02]
0001 0110
Panel type - non-EL, 8-bit data, format 1, color, dual, passive
[03]
0000 0000
Mod rate used by older monochrome panels - set to 0
[04]
0100 1111
Horizontal display size = (Reg[04]+1)*8 = (79+1)*8 = 640 pixels
see note for REG[16h] and
REG[17h]
REG[17h]
[05]
0000 0011
Horizontal non-display size = (Reg[05]+1)*8 = (3+1)*8 = 32
pixels
pixels