Philips S1D13505 用户手册

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页码 556
Page 14
Epson Research and Development
Vancouver Design Center
S1D13505
Programming Notes and Examples
X23A-G-003-07
Issue Date: 01/02/05
[24]
0000 0000
The remaining register control operation of the LUT and 
hardware cursor/ink layer. During the chip initialization none of 
these registers needs to be set. It is safe to write them to zero 
as this is the power-up value for the registers.
[26]
0000 0000
[27]
0000 0000
[28]
0000 0000
[29]
0000 0000
[2A]
0000 0000
[2B]
0000 0000
[2C]
0000 0000
[2D]
0000 0000
[2E]
0000 0000
[2F]
0000 0000
[30]
0000 0000
[31]
0000 0000
[23]
0000 0000
Enable FIFO, mask in appropriate FIFO threshold bits
S1D13505 Hardware 
Functional Specification, 
document number
X23A-A-001-xx
[0D]
0000 1101
Display mode - hardware portrait mode disabled, 8 bpp and 
LCD enabled
Table 2-1: S1D13505 Initialization Sequence (Continued)
Register
Value
Notes
See Also