Cypress STK14C88-5 用户手册
STK14C88-5
Document Number: 001-51038 Rev. **
Page 11 of 17
AutoStore or Power Up RECALL
Parameter
Alt
Description
STK14C88-5
Unit
Min
Max
t
HRECALL
t
RESTORE
Power up RECALL Duration
550
μs
t
STORE
t
HLHZ
STORE Cycle Duration
10
ms
t
DELAY
t
HLQZ ,
t
BLQZ
Time Allowed to Complete SRAM Cycle
1
μs
V
SWITCH
Low Voltage Trigger Level
4.0
4.5
V
V
RESET
Low Voltage Reset Level
3.6
V
t
VCCRISE
V
CC
Rise Time
150
μs
t
VSBL
Low Voltage Trigger (V
SWITCH
) to HSB low
300
ns
Switching Waveforms
Figure 12. AutoStore/Power Up RECALL
WE
Notes
15. t
HRECALL
starts from the time V
CC
rises above V
SWITCH
.
16. CE and OE low and WE high for output behavior.
17. HSB is asserted low for 1us when V
17. HSB is asserted low for 1us when V
CAP
drops through V
SWITCH
. If an SRAM WRITE has not taken place since the last nonvolatile cycle, HSB is released and no store
takes place.