Cypress CY8C24123A 用户手册

Document Number: 38-12028  Rev. *I

Page 27 of 56

ΔV

PUMP_Line

Line Regulation (over V

BAT

 range)

–

5

–

%V

O

 

Configuration listed in footnote.

a

 

V

O

 is the “Vdd Value for PUMP 

Trip” specified by the VM[2:0] 
setting in the DC POR and LVD 
Specification, 

ΔV

PUMP_Load

Load Regulation

–

5

–

%V

O

 

Configuration listed in footnote.

a

 

V

O

 is the “Vdd Value for PUMP 

Trip” specified by the VM[2:0] 
setting in the DC POR and LVD 
Specification, 

 on page 30.

ΔV

PUMP_Ripple

Output Voltage Ripple (depends on 
capacitor/load)

–

100

–

mVpp

Configuration listed in footnote.

a

 

Load is 5 mA.

E

3

Efficiency

35

50

–

%

Configuration listed in footnote.

a

 

Load is 5 mA. SMP trip voltage is 
set to 3.25V.

E

2

Efficiency

F

PUMP

Switching Frequency

–

1.3

–

MHz

DC

PUMP

Switching Duty Cycle

–

50

–

%

a. L

1

 = 2 mH inductor, C

1

 = 10 mF capacitor, D

1

 = Schottky diode. See 

Table 24.  DC Switch Mode Pump (SMP) Specifications  (continued)

Battery

C1

D1

+

Vdd

Vss

SMP

V

BAT

L

1

V

PUMP