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Chapter 26  DMA Controller
4.Operation Flowcharts
Figure 4-2  Operation Flowchart for Burst Transfer
Demand Transfer
Load the initial address,
transfer count, and
number of blocks
Activation request
wait
DMA transfer end
DMA interrupted
BLK=0
DTC=0
DMA stop
DENB=1
DENB=>0
Write back the address,
transfer count, and number
of blocks
Number of blocks - 1
Interrupt clear
One-time access for fly-by
Reload enable
Only when the peripheral interrupt
activation source is selected
Calculate the address for
transfer source address access
Calculate the address for transfer
destination address access
Transfer count - 1
Interrupt cleared
Burst transfer
-  Can be activated by all activation sources (selection).
-  Can access to all areas.
-  The number of blocks can be set.
-  Interrupt clear and the DMA interrupt are issued when 
   transfer for the number of times specified is completed.