Fujitsu FR81S 用户手册
CHAPTER 48: WAVEFORM GENERATOR
5. Operation
FUJITSU SEMICONDUCTOR LIMITED
CHAPTER : WAVEFORM GENERATOR
FUJITSU SEMICONDUCTOR CONFIDENTIAL
30
5.2. Operation of the Waveform Generator
The operation of the waveform generator is explained.
The waveform generator can generate various types of waveforms (including dead time) using the real-time
output (RTO0 to RTO5), 16-bit PPG timer 0/2/4, and 16-bit dead timer 0/1/2.
Output state of RTO0 to RTO5 and GATE
Table 5-4 RTO/GATE Output State and Bit Settings
TMD2 TMD1 TMD0 GTEN PGEN
RTO
GATE
0
0
0
X
X
Compare output OUT
(16-bit output compare output)
Always "0"
0
0
1
0/1
0
Compare output OUT
(16-bit output compare output)
(OUT and GTEN)
*3
0
1
Output the PPG0/PPG2/PPG4
pulses while the OUT is "H"
*1
Always "0"
1
1
Output the PPG0/PPG2/PPG4
pulses activated by GATE signals
while the OUT is "H"
OUT
0
1
0
0/1
0
Activate the 16-bit dead timer by the
rising edge of OUT, and "H" is being
output until the 16-bit dead timer
underflows.
When GTEN and
the timer is active,
"H" is being
output
*4
0
1
Activate the 16-bit dead timer by the
rising edge of OUT, and
PPG0/PPG2/PPG4 pulses are being
output until the 16-bit dead timer
underflows.
*1
Always "0"
1
1
Activate the 16-bit dead timer by the
rising edge of OUT, and
PPG0/PPG2/PPG4 pulses activated
by GATE signals are being output
until the 16-bit dead timer
underflows.
When the timer
is active, "H"
is being output
*4
1
0
0
X
X
Generate a non-overlap signal at
OUT
*2
Always "0"
1
1
1
0
X
Setting prohibited
-
1
X
Setting prohibited
-
Others
Always "0"
Always "0"
*1: You will need to select a channel you wish to use from the PPG0/PPG2/PPG4 and activate the PPG in
advance.
*2: To generate a non-overlap signal, make sure to select the 2-channel mode (compare control register
(OCS1, OCS3, OCS5); CMOD=1) for the OUT1, OUT3, and OUT5.
*3: GATE signal will be generated from the OUT of which GTEN bit is set to "1".
*4: GATE signal will be generated during the operation of the timer activated by the OUT of which GTEN bit
is set to "1". If more than one GATE bit is set to "1", GATE signal will be the OR signal of signals in each
active timer operation.
MB91520 Series
MN705-00010-1v0-E
2075