Fujitsu FR81S 用户手册
CHAPTER 5: CLOCK
5. Operation
FUJITSU SEMICONDUCTOR LIMITED
CHAPTER : CLOCK
FUJITSU SEMICONDUCTOR CONFIDENTIAL
79
5.6.1. Procedure of Gear Up
The procedure of gear up is shown.
1. The clock of the start step set to the clock gear start step selection is output after the oscillation
stabilization wait timer completes.
2. When the clock gear start (CCCGRCR0:GRSTR) is set to "1" and the rising is detected, the clock gear
status flag (CCCGRCR0:GRSTS[1:0]) transits to "00" → "01" (gear up start).
3. The gear up is executed according to the clock gear step selection and the repeat number selection. The
step number is the smaller and the repeat number is the larger that the operation changes the more
gradually
4. When the clock reaches the maximum step, the clock gear status flag (CCCGRCR0:GRSTS[1:0])
transits to "01" → "10"
(the end of gear up, the gear stops). After this, a clock is output at the maximum step (64 steps).
5. After the gear stops, the clock gear start (CCCGRCR0:GRSTR) is cleared to "0" by hardware.
MB91520 Series
MN705-00010-1v0-E
240