Texas Instruments TMS320C2XX 用户手册

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页码 587
’C209 Interrupts
 
11-12
Figure 11–2.’C209 Interrupt Flag Register (IFR) — Data-Memory Address 0006h
15
4
3
2
1
0
ÉÉÉÉÉÉÉÉÉÉÉÉÉÉÉÉÉ
ÉÉÉÉÉÉÉÉÉÉÉÉÉÉÉÉÉ
Reserved
TINT
INT3
INT2
INT1
0
R/W1C–0
R/W1C–0
R/W1C–0
R/W1C–0
Note:
0 = Always read as zeros; R = Read access; W1C = Write 1 to this bit to clear it to 0;
value following dash (–) is value after reset.
Bits 15–4
Reserved. Bits 15–4 are reserved and are always read as 0s.
Bit 3
TINT — Timer interrupt flag. Bit 3 indicates whether interrupt TINT is pending
(whether TINT is requesting acknowledgment from the CPU).
TINT = 0
Interrupt TINT is not pending.
TINT = 1
Interrupt TINT is pending.
Bit 2
INT3 — Interrupt 3 flag. Bit 2 indicates whether INT3 is pending (whether INT3 is
requesting acknowledgment from the CPU).
INT3 = 0
INT3 is not pending.
INT3 = 1
INT3 is pending.
Bit 1
INT2 — Interrupt 2 flag. Bit 1 indicates whether INT2 is pending (whether INT2 is
requesting acknowledgment from the CPU).
INT2 = 0
INT2 is not pending.
INT2 = 1
INT2 is pending.
Bit 0
INT1 — Interrupt 1 flag. Bit 0 indicates whether INT1 is pending (whether INT1 is
requesting acknowledgment from the CPU).
INT1 = 0
INT1 is not pending.
INT1 = 1
INT1 is pending.