Texas Instruments TMS320C645x DSP 用户手册
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5.50.3
Multicast Receive Frames Register (RXMCASTFRAMES)
5.50.4
Pause Receive Frames Register (RXPAUSEFRAMES)
5.50.5
Receive CRC Errors Register (RXCRCERRORS)
5.50.6
Receive Alignment/Code Errors Register (RXALIGNCODEERRORS)
EMAC Port Registers
The total number of good multicast frames received on the EMAC. A good multicast frame is defined as
having all of the following:
having all of the following:
•
Any data or MAC control frame that was destined for any multicast address other than
FF-FF-FF-FF-FF-FFh
FF-FF-FF-FF-FF-FFh
•
Was of length 64 to RXMAXLEN bytes inclusive
•
Had no CRC error, alignment error, or code error
See
for alignment/code/CRC error definitions. Overruns have no effect on this statistic.
The total number of IEEE 802.3X pause frames received by the EMAC (whether acted upon or not). A
pause frame is defined as having all of the following:
pause frame is defined as having all of the following:
•
Contained any unicast, broadcast, or multicast address
•
Contained the length/type field value 88.08h and the opcode 0001h
•
Was of length 64 to RXMAXLEN bytes inclusive
•
Had no CRC error, alignment error, or code error
•
Pause-frames had been enabled on the EMAC (TXFLOWEN bit is set in MACCONTROL).
The EMAC could have been in either half-duplex or full-duplex mode. See
for
alignment/code/CRC error definitions. Overruns have no effect on this statistic.
The total number of frames received on the EMAC that experienced a CRC error. A frame with CRC
errors is defined as having all of the following:
errors is defined as having all of the following:
•
Was any data or MAC control frame that matched a unicast, broadcast, or multicast address, or
matched due to promiscuous mode
matched due to promiscuous mode
•
Was of length 64 to RXMAXLEN bytes inclusive
•
Had no alignment or code error
•
Had a CRC error. A CRC error is defined as having all of the following:
–
A frame containing an even number of nibbles
–
Fails the frame check sequence test
See
for definitions of alignment and code errors. Overruns have no effect on this statistic.
The total number of frames received on the EMAC that experienced an alignment error or code error.
Such a frame is defined as having all of the following:
Such a frame is defined as having all of the following:
•
Was any data or MAC control frame that matched a unicast, broadcast, or multicast address, or
matched due to promiscuous mode
matched due to promiscuous mode
•
Was of length 64 to RXMAXLEN bytes inclusive
•
Had either an alignment error or a code error
–
An alignment error is defined as having all of the following:
•
A frame containing an odd number of nibbles
•
Fails the frame check sequence test, if the final nibble is ignored
–
A code error is defined as a frame that has been discarded because the EMACs MRXER pin is
driven with a one for at least one bit-time's duration at any point during the frame's reception.
driven with a one for at least one bit-time's duration at any point during the frame's reception.
Overruns have no effect on this statistic.
CRC alignment or code errors can be calculated by summing receive alignment errors, receive code
errors, and receive CRC errors.
errors, and receive CRC errors.
SPRU975B – August 2006
Ethernet Media Access Controller (EMAC)/Management Data Input/Output (MDIO)
137