Nxp Semiconductors UM10237 用户手册

下载
页码 792
UM10237_2
© NXP B.V. 2008. All rights reserved.
User manual
Rev. 02 — 19 December 2008 
349 of 792
NXP Semiconductors
UM10237
Chapter 13: LPC24XX USB device controller
 
9.6 USB transfer registers
The registers in this group are used for transferring data between endpoint buffers and 
RAM in Slave mode operation. See 
.
9.6.1 USB Receive Data register (USBRxData - 0xFFE0  C218)
For an OUT transaction, the CPU reads the endpoint buffer data from this register. Before 
reading this register, the RD_EN bit and LOG_ENDPOINT field of the USBCtrl register 
should be set appropriately. On reading this register, data from the selected endpoint 
buffer is fetched. The data is in little endian format: the first byte received from the USB 
bus will be available in the least significant byte of USBRxData. USBRxData is a read only 
register.
 
9.6.2 USB Receive Packet Length register (USBRxPLen - 0xFFE0  C220)
This register contains the number of bytes remaining in the endpoint buffer for the current 
packet being read via the USBRxData register, and a bit indicating whether the packet is 
valid or not. Before reading this register, the RD_EN bit and LOG_ENDPOINT field of the 
USBCtrl register should be set appropriately. This register is updated on each read of the 
USBRxData register. USBRxPLen is a read only register.
The Endpoint Index is set via the USBEpIn register. MPS_EP0 to MPS_EP31 are accessed via the 
USBMaxPSize register.
Fig 46. USB MaxPacketSize register array indexing
ENDPOINT INDEX
MPS_EP0
MPS_EP31
Table 321. USB Receive Data register (USBRxData - address 0xFFE0  C218) bit description
Bit
Symbol
Description
Reset value
31:0
RX_DATA
Data received.
0x0000 0000