Nxp Semiconductors UM10237 用户手册

UM10237_2

User manual

Rev. 02 — 19 December 2008

38 of 792

NXP Semiconductors

UM10237

Chapter 3: LPC24XX System control

[1]

Sequence based on round-robin.

[1]

Sequence based on round-robin.

3.4.2 AHB Arbiter Configuration register 2 (AHBCFG2 - 0xE01F C18C)

By default, the AHB2 access is scheduled round-robin (bit 0 = 1). For round-robin
scheduling, the default priority sequence will be Ethernet and CPU.
The AHB2 access priority can be configured as priority scheduling (bit 0 = 0) and priority
of the each of the AHB2 bus masters can be set by writing the priority value (highest
priority = 2, lowest priority = 1).

Masters with the same priority value are scheduled on a round-robin basis.

Table 32.

Priority sequence (bit 0 = 0): LCD, CPU, GPDMA, AHB1, USB

Bit

Symbol

Description

Priority value nnn

Priority sequence