Nxp Semiconductors UM10237 用户手册

UM10237_2

© NXP B.V. 2008. All rights reserved.

– SPI controller.

– Two SSP controllers, with FIFO and multi-protocol capabilities. One is an alternate 

for the SPI port, sharing its interrupt. SSPs can be used with the GPDMA 
controller.

– Three I

2

C-bus interfaces (one with open-drain and two with standard port pins).

– I

2

S (Inter-IC Sound) interface for digital audio input or output. It can be used with 

the GPDMA.

Other peripherals:

– SD/MMC memory card interface.

– 160 general purpose I/O pins with configurable pull-up/down resistors.

– 10-bit ADC with input multiplexing among 8 pins.

– 10-bit DAC.

– Four general purpose timers/counters with 8 capture inputs and 10 compare 

outputs. Each timer block has an external count input.

– Two PWM/timer blocks with support for three-phase motor control. Each PWM has 

an external count inputs.

– Real-Time Clock (RTC) with separate power domain, clock source can be the RTC 

oscillator or the APB clock.

– 2 kB SRAM powered from the RTC power pin, allowing data to be stored when the 

rest of the chip is powered off.

– WatchDog Timer (WDT). The WDT can be clocked from the internal RC oscillator, 

the RTC oscillator, or the APB clock.

Standard ARM test/debug interface for compatibility with existing tools.

Emulation trace module supports real-time trace.

Single 3.3 V power supply (3.0 V to 3.6 V).

Three reduced power modes: idle, sleep, and power-down.

Four external interrupt inputs configurable as edge/level sensitive. All pins on PORT0 
and PORT2 can be used as edge sensitive interrupt sources.

Processor wake-up from Power-down mode via any interrupt able to operate during 
Power-down mode (includes external interrupts, RTC interrupt, USB activity, Ethernet 
wake-up interrupt, CAN bus activity, PORT0/2 pin interrupt).

Two independent power domains allow fine tuning of power consumption based on 
needed features.

Each peripheral has its own clock divider for further power saving. These dividers help 
reducing active power by 20 - 30 %.

Brownout detect with separate thresholds for interrupt and forced reset.

On-chip power-on reset.

On-chip crystal oscillator with an operating range of 1 MHz to 24 MHz.

4 MHz internal RC oscillator trimmed to 1 % accuracy that can optionally be used as 
the system clock. When used as the CPU clock, does not allow CAN and USB to run.

On-chip PLL allows CPU operation up to the maximum CPU rate without the need for 
a high frequency crystal. May be run from the main oscillator, the internal RC 
oscillator, or the RTC oscillator.