Nxp Semiconductors UM10237 用户手册

UM10237_2

© NXP B.V. 2008. All rights reserved.

To program a DMA channel:

1. Choose a free DMA channel with the priority required. DMA channel 0 has the highest 

priority and DMA channel 1 the lowest priority.

2. Clear any pending interrupts on the channel to be used by writing to the 

DMACIntTCClr Register (

) and DMACIntErrClr Register (

). The previous 

channel operation might have left interrupts active.

3. Write the source address into the DMACCxSrcAddr Register (

4. Write the destination address into the DMACCxDestAddr Register (

5. Write the address of the next Linked List Item (LLI) into the DMACCxLLI Register 

). If the transfer consists of a single packet of data 

then 0 must be written into this register.

6. Write the control information into the DMACCxControl Register (

).

7. Write the channel configuration information into the DMACCxConfiguration Register 

). If the Enable bit is set 

then the DMA channel is automatically enabled.

The GPDMA registers are shown in 

.

 

DMACIntStatus

Interrupt Status Register

RO

0x0

0xFFE0 4000

DMACIntTCStatus

Interrupt Terminal Count 
Status Register

RO

0x0

0xFFE0 4004

DMACIntTCClear

Interrupt Terminal Count Clear 
Register

WO

-

0xFFE0 4008

DMACIntErrorStatus

Interrupt Error Status Register

RO

0x0

0xFFE0 400C

DMACIntErrClr

Interrupt Error Clear Register

WO

-

0xFFE0 4010

DMACRawIntTCStatus

Raw Interrupt Terminal Count 
Status Register

RO

-

0xFFE0 4014

DMACRawIntErrorStatus Raw Error Interrupt Status 

Register

RO

-

0xFFE0 4018