Nxp Semiconductors UM10237 用户手册

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页码 792
UM10237_2
© NXP B.V. 2008. All rights reserved.
User manual
Rev. 02 — 19 December 2008 
739 of 792
NXP Semiconductors
UM10237
Chapter 32: LPC24XX General Purpose DMA (GPDMA) controller
11. Flow control
The peripheral that controls the length of the packet is known as the flow controller. The 
flow controller is usually the GPDMA where the packet length is programmed by software 
before the DMA channel is enabled. If the packet length is unknown when the DMA 
channel is enabled, either the source or destination peripherals can be used as the flow 
controller.
For simple or low-performance peripherals that know the packet length (that is, when the 
peripheral is the flow controller), a simple way to indicate that a transaction has completed 
is for the peripheral to generate an interrupt and enable the processor to reprogram the 
DMA channel.
The transfer size value (in the DMACCxControl register) is ignored if a peripheral is 
configured as the flow controller.
When the DMA is transferred:
1. The GPDMA issues an acknowledge to the peripheral in order to indicate that the 
transfer has finished.
2. A TC interrupt is generated, if enabled.
3. The GPDMA moves on to the next LLI.