Motorola MCF5281 用户手册
MOTOROLA
Chapter 17. Fast Ethernet Controller (FEC)
17-43
Programming Model
17.5.4.22 Transmit Buffer Descriptor Ring Start (ETSDR)
The ETSDR is written by the user. It provides a pointer to the start of the circular transmit
buffer descriptor queue in external memory. This pointer must be 32-bit aligned; however,
it is recommended it be made 128-bit aligned (evenly divisible by 16). Bits 1 and 0 should
be written to 0 by the user. Non-zero values in these two bit positions are ignored by the
hardware.
buffer descriptor queue in external memory. This pointer must be 32-bit aligned; however,
it is recommended it be made 128-bit aligned (evenly divisible by 16). Bits 1 and 0 should
be written to 0 by the user. Non-zero values in these two bit positions are ignored by the
hardware.
This register is not reset and must be initialized by the user prior to operation.
31
16
Field
R_DES_START
Reset
Uninitialized
R/W
R/W
15
2
1
0
Field
R_DES_START
—
Reset
Uninitialized
R/W
R/W
Address
IPSBAR + 0x1180
Figure 17-24. Receive Descriptor Ring Start Register (ERDSR)
Table 17-33. ERDSR Field Descriptions
Bits
Name
Descriptions
31–2
R_DES_START Pointer to start of receive buffer descriptor queue.
1–0
—
Reserved, should be cleared.
31
16
Field
X_DES_START
Reset
Uninitialized
R/W
R/W
15
2
1
0
Field
X_DES_START
—
Reset
Uninitialized
R/W
R/W
Address
IPSBAR + 0x1184
Figure 17-25. Transmit Buffer Descriptor Ring Start Register (ETDSR)