Motorola MCF5281 用户手册
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Chapter 24. I
2
C Interface
24-11
I
2
C Programming Examples
NOTE
If I2SR[IBB] is set when the I
2
C bus module is enabled,
execute the following code sequence before proceeding with
normal initialization code. This issues a STOP command to the
slave device, placing it in idle state as if it were just
power-cycled on.
normal initialization code. This issues a STOP command to the
slave device, placing it in idle state as if it were just
power-cycled on.
I2CR = 0x0
I2CR = 0xA0
dummy read of I2DR
I2SR = 0x0
I2CR = 0x0
24.6.2 Generation of START
After completion of the initialization procedure, serial data can be transmitted by selecting
the master transmitter mode. On a multiple-master bus system, I2SR[IBB] must be tested
to determine whether the serial bus is free. If the bus is free (IBB = 0), the START signal
and the first byte (the slave address) can be sent. The data written to the data register
comprises the address of the desired slave and the lsb indicates the transfer direction.
the master transmitter mode. On a multiple-master bus system, I2SR[IBB] must be tested
to determine whether the serial bus is free. If the bus is free (IBB = 0), the START signal
and the first byte (the slave address) can be sent. The data written to the data register
comprises the address of the desired slave and the lsb indicates the transfer direction.
The free time between a STOP and the next START condition is built into the hardware that
generates the START cycle. Depending on the relative frequencies of the system clock and
the SCL period, it may be necessary to wait until the I
generates the START cycle. Depending on the relative frequencies of the system clock and
the SCL period, it may be necessary to wait until the I
2
C is busy after writing the calling
address to the I2DR before proceeding with the following instructions.
The following example signals START and transmits the first byte of data (slave address):
CHFLAG
MOVE.B I2SR,-(A0)
;Check I2SR[MBB]
BTST.B #5, (A0)+
BNE.S CHFLAG
;If I2SR[MBB] = 1, wait until it is clear
TXSTART MOVE.B I2CR,-(A0)
;Set transmit mode
BSET.B #4,(A0)
MOVE.B (A0)+, I2CR
MOVE.B I2CR, -(A0)
;Set master mode
BSET.B #5, (A0)
;Generate START condition
MOVE.B (A0)+, I2CR
MOVE.B CALLING,-(A0)
;Transmit the calling address, D0=R/W
MOVE.B (A0)+, I2DR
IFREE
MOVE.B I2SR,-(A0)
;Check I2SR[MBB]
;If it is clear, wait until it is set.
BTST.B #5, (A0)+
BEQ.S IFREE;
24.6.3 Post-Transfer Software Response
Sending or receiving a byte sets the I2SR[ICF], which indicates one byte communication
is finished. I2SR[IIF] is also set. An interrupt is generated if the interrupt function is
enabled during initialization by setting I2CR[IIEN]. Software must first clear I2SR[IIF] in
is finished. I2SR[IIF] is also set. An interrupt is generated if the interrupt function is
enabled during initialization by setting I2CR[IIEN]. Software must first clear I2SR[IIF] in