Motorola MCF5281 用户手册
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Chapter 26. General Purpose I/O Module
26-19
Memory Map/Register Definition
26.3.2.9 Port SD Pin Assignment Register (PSDPAR)
The PSDPAR controls the pin function of port SD.
26.3.2.10 Port AS Pin Assignment Register (PASPAR)
The PASPAR controls the pin function of port AS.
7
6
0
Field
PSDPA
—
Reset See Note 1
1
1
Reset state determined during reset configuration. PJPAn = 1 in master mode and 0 in all other modes.
000_0000
R/W:
R/W
R
Address
IPSBAR + 0x10_0055
Figure 26-22. Port SD Pin Assignment Register (PSDPAR)
Table 26-13. PSDPAR Field Descriptions
Bits
Name
Description
7
PSDPA
Port SD pin assignment. This bit configures the port SD[5:0] pins for
their primary functions (SRAS, SCAS, DRAMW, SDRAM_CS[1:0],
SCKE) or digital I/O.
1 Port SD[5:0] pins configured for primary functions (SRAS, SCAS,
their primary functions (SRAS, SCAS, DRAMW, SDRAM_CS[1:0],
SCKE) or digital I/O.
1 Port SD[5:0] pins configured for primary functions (SRAS, SCAS,
DRAMW, SDRAM_CS[1:0], SCKE)
0 Port SD[5:0] pin configured for digital I/O
6–0
—
Reserved, should be cleared.
15
12
11
10
9
8
Field
—
PASPA5
PASPA4
Reset
0000_0000
R/W:
R
R/W
7
6
5
4
3
2
1
0
Field
PASPA3
PASPA2
PASPA1
PASPA0
Reset
0000_0000
R/W:
R/W
Address
IPSBAR + 0x10_0056
Figure 26-23. Port AS Pin Assignment Register (PASPAR)