Motorola MCF5281 用户手册

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Chapter 28.  Reset Controller Module  
28-3
Memory Map and Registers
28.4 Memory Map and Registers
The reset controller programming model consists of these registers:
• Reset control register (RCR), which selects reset controller functions
• Reset status register (RSR), which reflects the state of the last reset source
See Table 28-2 for the memory map and the following paragraphs for a description of the
registers.
28.4.1 Reset Control Register (RCR)
The RCR allows software control for requesting a reset, for independently asserting the
external RSTO pin, and for controlling low-voltage detect (LVD) functions.
Table 28-2. Reset Controller Memory Map
IPSBAR Offset
Bits 7:0
Access
 1
1
S/U = supervisor or user mode access.
0x11_0000
RCR
S/U
0x11_0001
RSR
S/U
0x11_0002
Reserved
2
0x11_0003
Reserved
 2
2
Writes to reserved address locations have no effect and reads return 0s.
7
6
5
4
0
Field SOFTRST
FRCRSTOUT
LVDF
LVDIE LVDRE
LVDE
Reset
0000_0101
R/W
R/W
Address
IPSBAR + 0x11_0000
Figure 28-2. Reset Control Register (RCR)
Table 28-3. RCR Field Descriptions
Bit(s)
Name
Description
7
SOFTRST
Allows software to request a reset. The reset caused by setting this bit clears this bit.
1 Software reset request
0 No software reset request
6
FRCRSTOUT
Allows software to assert or negate the external RSTO pin.
1 Assert RSTO pin
0 Negate RSTO pin
CAUTION: External logic driving reset configuration data during reset needs to be considered 
when asserting the RSTO pin when setting FRCRSTOUT.
5
Reserved, should be cleared.