Motorola MC68VZ328 用户手册
Programming Model
DRAM Controller
7-13
The REF value is the time of 1 refresh cycle.
Example 7-1. Calculating REF Field Values for Refresh Times
When CLK = 0, 32 kHz (or 34.8 kHz) is used for refresh control.
•
If REF = 0, the refresh rate = 2
×
32 kHz.
•
If REF = 1, the refresh rate = 32 kHz.
•
If REF = (2 to 15), the refresh rate = 32 kHz / (REF + 1).
When CLK = 1, the system clock is used for refresh control.
•
The refresh rate = SYSCLK / (32
×
(REF + 1)).
REF
Bits 4–0
Bits 4–0
Refresh Cycle—This value determines the refresh rate for
the DRAM controller. The refresh rate can be calculated
using the equation shown in Example 7-1.
the DRAM controller. The refresh rate can be calculated
using the equation shown in Example 7-1.
See description
Table 7-6. DRAM Memory Configuration Register Description (Continued)
Name
Description
Setting