Motorola MC68VZ328 用户手册
1-6
MC68VZ328 User’s Manual
CPU
1.2.2
Data and Address Mode Types
The CPU supports five types of data and six main types of address modes. The five types of data are bits,
binary-coded decimal (BCD) digits, bytes, words, and long words. The six types of address modes are
shown in Table 1-1.
binary-coded decimal (BCD) digits, bytes, words, and long words. The six types of address modes are
shown in Table 1-1.
1.2.3
FLX68000 Instruction Set
The FLX68000 CPU instruction set supports high-level languages that facilitate programming. Almost
every instruction operates on bytes, words, and long words, and most of them can use any of the 14 address
modes. Combining instruction types, data types, and address modes provides access to over 1,000 possible
instructions. These instructions, shown in Table 1-2 on page 1-7, include signed and unsigned multiply and
divide, quick arithmetic operations, binary-coded decimal (BCD) arithmetic, and expanded operations
(through traps).
every instruction operates on bytes, words, and long words, and most of them can use any of the 14 address
modes. Combining instruction types, data types, and address modes provides access to over 1,000 possible
instructions. These instructions, shown in Table 1-2 on page 1-7, include signed and unsigned multiply and
divide, quick arithmetic operations, binary-coded decimal (BCD) arithmetic, and expanded operations
(through traps).
Table 1-1. Address Modes
Address Mode
Syntax
Register direct address
•
Data register direct
•
Address register direct
Dn
An
Absolute data address
•
Absolute short
•
Absolute long
xxx.W
xxx.L
Program counter relative address
•
Relative with offset
•
Relative with index offset
d
16
(PC)
d
8
(PC, Xn)
Register indirect address
•
Register indirect
•
Postincrement register indirect
•
Predecrement register indirect
•
Register indirect with offset
•
Indexed register indirect with offset
(An)
(An)+
–(An)
–(An)
d
16
(An)
d
8
(An, Xn)
Immediate data address
•
Immediate
•
Quick immediate
#xxx
#1–#8
Implied address
•
Implied register
SR/USP/SP/PC
Note:
Dn = Data register
An = Address register
Xn = Address or data register used as index register
SR = Status register
PC = Program counter
SP = Stack pointer
USP = User stack pointer
( ) = Effective address
d
Dn = Data register
An = Address register
Xn = Address or data register used as index register
SR = Status register
PC = Program counter
SP = Stack pointer
USP = User stack pointer
( ) = Effective address
d
8
= 8-bit offset (displacement)
d
16
= 16-bit offset (displacement)
#xxx = Immediate data