Motorola MC68VZ328 用户手册

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页码 376
CPU
Introduction
1-7
 
Table 1-2.   Instruction Set
Mnemonic
Description
Mnemonic
Description
ABCD
Add decimal with extend
MOVEM
Move multiple registers
ADD
Add 
MOVEP
Move peripheral data
ADDA
Add address
MOVEQ
Move quick
ADDQ
Add quick
MOVE from SR
Move from status register
ADDI
Add immediate
MOVE to SR
Move to status register
ADDX
Add with extend
MOVE to CCR
Move to condition codes
AND
Logical AND
MOVE USP
Move user stack pointer
ANDI
AND immediate
MULS
Signed multiply
ANDI to CCR
AND immediate to condition codes
MULU
Unsigned multiply
ANDI to SR
AND immediate to status register
NBCD
Negate decimal with extend
ASL
Arithmetic shift left
NEG
Negate
ASR
Arithmetic shift right
NEGX
Negate with extend
Bcc
Branch conditionally
NOP
No operation
BCHG
Bit test and change
NOT
One’s-complement
BCLR
Bit test and clear
OR
Logical OR
BRA
Branch always
ORI
OR immediate
BSET
Bit test and set
ORI to CCR
OR immediate to condition codes
BSR
Branch to subroutine
ORI to SR
OR immediate to status register
BTST
Bit test
PEA
Push effective address
CHK
Check register against bounds
RESET
Reset external devices
CLR
Clear operand
ROL
Rotate left without extend
CMP
Compare
ROR
Rotate right without extend
CMPA
Compare address
ROXL
Rotate left with extend
CMPM
Compare memory
ROXR
Rotate right with extend
CMPI
Compare immediate
RTE
Return from exception
DBcc
Test conditionally, decrement, and branch
RTR
Return and restore
DIVS
Signed divide
RTS
Return from subroutine
DIVU
Unsigned divide
SBCD
Subtract decimal with extend
EOR
Exclusive OR
Scc
Set conditional