Motorola MC68VZ328 用户手册
6-4
MC68VZ328 User’s Manual
Programming Model
6.2.3
Overlapping Chip-Select Registers
Do not program group address and chip-select registers to overlap, or the chip-select signals will overlap.
Unused chip-selects must be disabled. Map them to an unused space, if possible.
Unused chip-selects must be disabled. Map them to an unused space, if possible.
When the CPU tries to write to a read-only location that has already been programmed, the chip-select and
DTACK signals will not be generated internally. BERR will be asserted internally if the bus error time-out
function is enabled.
DTACK signals will not be generated internally. BERR will be asserted internally if the bus error time-out
function is enabled.
NOTE:
The chip-select logic does not allow an address match during interrupt
acknowledge cycles.
acknowledge cycles.
6.3
Programming Model
The chip-select module contains registers that are programmed to control external devices, such as
memory. Chip-selects do not operate until the register in a particular group of devices is initialized and the
EN bit is set in the corresponding chip-select register. The only exception is the CSA0 signal, which is the
boot device chip-select.
memory. Chip-selects do not operate until the register in a particular group of devices is initialized and the
EN bit is set in the corresponding chip-select register. The only exception is the CSA0 signal, which is the
boot device chip-select.
6.3.1
Chip-Select Group Base Address Registers
The upper 15 bits of each base address register selects the starting address for the chip-select address
range. The GBAx field is compared to the address on the address bus to determine if the group is decoded.
The chip-select base address must be set according to the size of the corresponding chip-select signals of
the group. For example, if CSA1 and CSA0 are each assigned a 2 Mbyte memory space, the CSGBA
register must be set in a 4 Mbyte space boundary, such as system address 0
range. The GBAx field is compared to the address on the address bus to determine if the group is decoded.
The chip-select base address must be set according to the size of the corresponding chip-select signals of
the group. For example, if CSA1 and CSA0 are each assigned a 2 Mbyte memory space, the CSGBA
register must be set in a 4 Mbyte space boundary, such as system address 0
×
0, 0
×
4 Mbyte, 0
×
8 Mbyte,
and so on. It cannot be set at 0
×
1 Mbyte, 0
×
2 Mbyte, 0
×
3 Mbyte, 0
×
5 Mbyte, and so on.
CSGBA
Chip-Select Group A Base Address Register
0x(FF)FFF100
BIT
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
BIT 0
GB
A28
GB
A27
GB
A26
GB
A25
GB
A24
GB
A23
GB
A22
GB
A21
GB
A20
GB
A19
GB
A18
GB
A17
GB
A16
GB
A15
GB
A14
TYPE
rw
rw
rw
rw
rw
rw
rw
rw
rw
rw
rw
rw
rw
rw
rw
RESET
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0x0000
Table 6-2. Chip-Select Group A Base Address Register Description
Name Description
Setting
GBAx
Bits
Bits
15–1
Group A Base Address—These bits select
the high-order bits (28–14) of the starting
address for the chip-select range.
the high-order bits (28–14) of the starting
address for the chip-select range.
The chip-select base address must be set
according to the size of the corresponding
chip-select signals of the group.
according to the size of the corresponding
chip-select signals of the group.
Reserved
Bit 0
Bit 0
Reserved
This bit is reserved and should be set to 0.