Motorola MVME172 用户手册
2-36
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VMEchip2
2
VMEbus Slave Address Modifier Select Register 1
This register is the address modifier select register for the first VMEbus to
local bus map decoder. There are three groups of address modifier select
bits: DAT, PGM, BLK and D64; A24 and A32; and USR and SUP. At least
one bit must be set from each group to enable the first map decoder.
local bus map decoder. There are three groups of address modifier select
bits: DAT, PGM, BLK and D64; A24 and A32; and USR and SUP. At least
one bit must be set from each group to enable the first map decoder.
DAT
When this bit is high, the first map decoder responds to
VMEbus data access cycles. When this bit is low, the first
map decoder does not responded to VMEbus data access
cycles.
VMEbus data access cycles. When this bit is low, the first
map decoder does not responded to VMEbus data access
cycles.
PGM
When this bit is high, the first map decoder responds to
VMEbus program access cycles. When this bit is low, the
first map decoder does not respond to VMEbus program
access cycles.
VMEbus program access cycles. When this bit is low, the
first map decoder does not respond to VMEbus program
access cycles.
BLK
When this bit is high, the first map decoder responds to
VMEbus block access cycles. When this bit is low, the
first map decoder does not respond to VMEbus block
access cycles.
VMEbus block access cycles. When this bit is low, the
first map decoder does not respond to VMEbus block
access cycles.
D64
When this bit is high, the first map decoder responds to
VMEbus D64 block access cycles. When this bit is low,
the first map decoder does not respond to VMEbus D64
block access cycles.
VMEbus D64 block access cycles. When this bit is low,
the first map decoder does not respond to VMEbus D64
block access cycles.
A24
When this bit is high, the first map decoder responds to
VMEbus A24 (standard) access cycles. When this bit is
low, the first map decoder does not respond to VMEbus
A24 access cycles.
VMEbus A24 (standard) access cycles. When this bit is
low, the first map decoder does not respond to VMEbus
A24 access cycles.
ADR/SIZ
$FFF40010 (8 bits of 32)
BIT
7
6
5
4
3
2
1
0
NAME
SUP
USR
A32
A24
D64
BLK
PGM
DAT
OPER
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
RESET
0 PSL
0 PSL
0 PSL
0 PSL
0 PSL
0 PSL
0 PSL
0 PSL