Motorola MVME172 用户手册
2-66
Computer Group Literature Center Web Site
VMEchip2
2
DMAC Ton/Toff Timers and VMEbus Global Time-out Control Register
This register controls the DMAC time off timer, the DMAC time on timer,
and the VMEbus global time-out timer.
and the VMEbus global time-out timer.
VGTO
These bits define the VMEbus global time-out value.
When DS0 or DS1 is asserted on the VMEbus, the timer
begins timing. If the timer times out before the data
strobes are removed, a BERR signal is sent to the
VMEbus. The global time-out timer is disabled when the
VMEchip2 is not system controller.
When DS0 or DS1 is asserted on the VMEbus, the timer
begins timing. If the timer times out before the data
strobes are removed, a BERR signal is sent to the
VMEbus. The global time-out timer is disabled when the
VMEchip2 is not system controller.
0
8
µ
s
1
64
µ
s
2
256
µ
s
3
The timer is disabled
TIME ON
These bits define the maximum time the DMAC spends
on the VMEbus:
on the VMEbus:
0
16
µ
s
4
256
µ
s
1
32
µ
s
5
512
µ
s
2
64
µ
s
6
1024
µ
s
3
128
µ
s
7
When done (or no data)
TIME OFF
These bits define the minimum time the DMAC spends
off the VMEbus:
off the VMEbus:
0
0
µ
s
4
128
µ
s
1
16
µ
s
5
256
µ
s
2
32
µ
s
6
512
µ
s
3
64
µ
s
7
1024
µ
s
ADR/SIZ
$FFF4004C (8 bits of 32)
BIT
23
22
21
20
19
18
17
16
NAME
TIME OFF
TIME ON
VGTO
OPER
R/W
R/W
R/W
RESET
0 PS
0 PS
0 PS