Motorola MVME172 用户手册
3-24
Computer Group Literature Center Web Site
MC2 Chip
3
Tick Timer 3 and 4 Control Registers
Tick Timer 4 Control Register
Tick Timer 3 Control Register
CEN
When this bit is high, the counter increments. When this
bit is low, the counter does not increment.
bit is low, the counter does not increment.
COC
When this bit is high, the counter is reset to zero when it
compares with the compare register. When this bit is low,
the counter is not reset.
compares with the compare register. When this bit is low,
the counter is not reset.
COVF
The overflow counter is cleared when a one is written to
this bit.
this bit.
OVF3-OVF0
These bits are the output of the overflow counter. The
overflow counter is incremented each time the tick timer
sends an interrupt to the local bus interrupter. The
overflow counter can be cleared by writing a one to
COVF.
overflow counter is incremented each time the tick timer
sends an interrupt to the local bus interrupter. The
overflow counter can be cleared by writing a one to
COVF.
ADR/SIZ
$FFF4201C (8 bits)
BIT
15
14
13
12
11
10
9
8
NAME
OVF3
OVF2
OVF1
OVF0
COVF
COC
CEN
OPER
R
R
R
R
R
C
R/W
R/W
RESET
0 PL
0 PL
0 PL
0 PL
0
0 PL
0 PL
0 PL
ADR/SIZ
$FFF4201C (8 bits)
BIT
7
6
5
4
3
2
1
0
NAME
OVF3
OVF2
OVF1
OVF0
COVF
COC
CEN
OPER
R
R
R
R
R
C
R/W
R/W
RESET
0 PL
0 PL
0 PL
0 PL
0
0 PL
0 PL
0 PL