Motorola MVME172 用户手册
Programming Model
http://www.mcg.mot.com/literature
4-17
4
Chip ID Register
The read-only Chip ID Register is hard-wired to a hexadecimal value of
$23. Writes to this register do nothing, however the IP2 chip terminates
them normally with TA*.
$23. Writes to this register do nothing, however the IP2 chip terminates
them normally with TA*.
Chip Revision Register
The read-only Chip Revision Register is hard-wired to reflect the revision
level of the IP2 chip ASIC. The current value of this register is $01. Writes
to this register do nothing, however the IP2 chip terminates them normally
with TA*.
level of the IP2 chip ASIC. The current value of this register is $01. Writes
to this register do nothing, however the IP2 chip terminates them normally
with TA*.
!
Caution
This register reads zero on some IP2 chips. It should read 1.
The workaround for this is to test the MC2 chip Revision
Register.
The workaround for this is to test the MC2 chip Revision
Register.
$80
Programmable
Clock INT CON-
TROL
0
IRE
INT
IEN
ICLR
IL2
IL1
IL0
$81
Programmable
Clock GEN
CONTROL
CONTROL
PLTY
PLS
0
EN
CLR
PS2
PS1
PS0
$82
Programmable
Clock TIMER
T15
T14
T13
T12
T11
T10
T9
T8
$83
Programmable
Clock TIMER
T7
T6
T5
T4
T3
T2
T1
T0
ADR/SIZ
$FFFBC000 (8 bits)
BIT
7
6
5
4
3
2
1
0
NAME
CID7
CID6
CID5
CID4
CID3
CID2
CID1
CID0
OPER
R
R
R
R
R
R
R
R
RESET
0
0
1
0
0
0
1
1
Table 4-3. IP2 Chip Memory Map - Control and Status Registers (Continued)
IP2 Chip Base Address = $FFFBC000
Register
Offset
Register Name
Register Bit Names
D7
D6
D5
D4
D3
D2
D1
D0