Intel Xeon L3406 CM80616005010AA 用户手册
产品代码
CM80616005010AA
Datasheet, Volume 2
29
Processor Integrated I/O (IIO) Configuration Registers
treated as static in the sense that they will not be changed without the decode control
bits being clear. Registers outside of this standard space will be noted as dynamic when
appropriate.
bits being clear. Registers outside of this standard space will be noted as dynamic when
appropriate.
3.3.2
Configuration Register Map
Figure 3-1. DMI Port (Device 0) and PCI Express* Root Ports Type 1 Configuration Space
0 0 h
4 0 h
1 0 0 h
F F F h
M S I C a p a b ilit y
P 2 P '
C A P _ P T R
P C I E C a p a b ilit y
Ex
te
n
de
d
C
onf
ig
ur
at
io
n
S
pa
ce
PC
I
D
ev
ic
e
D
ep
enden
t
PC
I
H
eade
r
P M C a p a b ilit y
S V I D / S D I D C a p a b ilit y