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7K200 SATA OEM Specification 
134/173 
Note 1.   
When Feature register is 03h (=Set Transfer mode), the Sector Count Register specifies the transfer 
mechanism. The upper 5 bits define the type of transfer and the low order 3 bits encode the mode 
value.  
 bits 
(7:3) 
bits 
(2:0) 
 
PIO Default Transfer Mode   
00000 
000 
 
PIO Default Transfer Mode, Disable IORDY 
00000 
001 
 
PIO Flow Control Transfer Mode x 
00001 
nnn 
(nnn=000,001,010,011,100) 
Multiword DMA mode x 
00100 
nnn 
(nnn=000,001,010) 
Ultra DMA mode x 
01000 
nnn 
(nnn=000,001,010,011,100,101) 
When Feature register is 05h (=Enable Advanced Power Management), the Sector Count Register specifies the 
Advanced Power Management level.   
C0h - FEh ... 
The deepest Power Saving mode is Active Idle 
80h - BFh ... 
The deepest Power Saving mode is Low power Idle 
01h - 7Fh ... 
The deepest Power Saving mode is Standby 
00h, FFh ... 
Aborted 
 
Note 2.   
  If the number of auto reassigned sectors reaches the device’s reassignment capacity, the write cache 
function will be automatically disabled. Although the device still accepts the Set Features 
command (with Feature register = 02h) without error, the write cache function will remain disabled. 
For current write cache function status, please refer to the Identify Device Information(129word) 
by Identify Device command.    Power off must not be done in 5 seconds after write command 
completion when write cache is enabled.   
Note 3. 
  When Feature register is 85h (=Disable Advanced Power Management), the deepest Power Saving 
mode becomes Active Idle.   
 
Note 4. 
  When the Feature register is set to 10h or 90h, the value set to the Sector Count register specifies the 
specific Serial ATA feature to enable or disable. 
  When the Feature register is set to 10h or 90h, the value set to the Sector Count register specifies the 
specific Serial ATA feature to enable or disable. 
 
Sector count value 
Description 
01h 
Non-zero buffer offset in DMA setup FIS 
02h 
DMA setup FIS auto-activate optimization 
03h Device-initiated 
interface power state transitions 
04h 
Guaranteed in-order data delivery 
06h 
Software Settings Preservation