Nxp Semiconductors LPC2194HBD64,151 ARM7 Microcontroller 16kB LQFP 64 LPC2194HBD64,151 数据表
产品代码
LPC2194HBD64,151
LPC2194_4
© Koninklijke Philips Electronics N.V. 2006. All rights reserved.
Product data sheet
Rev. 04 — 11 September 2006
18 of 36
Philips Semiconductors
LPC2194
Single-chip 16/32-bit microcontroller
•
Burst conversion mode for single or multiple inputs.
•
Optional conversion on transition on input pin or Timer Match signal.
6.12 CAN controllers and acceptance filter
The LPC2194 contains four CAN controllers. The CAN is a serial communications
protocol which efficiently supports distributed real-time control with a very high level of
security. Its domain of application ranges from high speed networks to low cost multiplex
wiring.
protocol which efficiently supports distributed real-time control with a very high level of
security. Its domain of application ranges from high speed networks to low cost multiplex
wiring.
6.12.1 Features
•
Data rates up to 1 Mbit/s on each bus.
•
32-bit register and RAM access.
•
Compatible with CAN specification 2.0B, ISO 11898-1.
•
Global Acceptance Filter recognizes 11-bit and 29-bit Rx identifiers for all CAN buses.
•
Acceptance Filter can provide FullCAN-style automatic reception for selected
Standard identifiers.
Standard identifiers.
6.13 UARTs
The LPC2194 each contain two UARTs. One UART provides a full modem control
handshake interface, the other provides only transmit and receive data lines.
handshake interface, the other provides only transmit and receive data lines.
6.13.1 Features
•
16 B Receive and Transmit FIFOs.
•
Register locations conform to 16C550 industry standard.
•
Receiver FIFO trigger points at 1 B, 4 B, 8 B, and 14 B.
•
Built-in baud rate generator.
•
Standard modem interface signals included on UART1.
6.14 I
2
C-bus serial I/O controller
The I
2
C-bus is a bidirectional bus for inter-IC control using only two wires: a serial clock
line (SCL), and a serial data line (SDA). Each device is recognized by a unique address
and can operate as either a receiver-only device (e.g., an LCD driver or a transmitter with
the capability to both receive and send information (such as memory). Transmitters and/or
receivers can operate in either master or slave mode, depending on whether the chip has
to initiate a data transfer or is only addressed. The I
and can operate as either a receiver-only device (e.g., an LCD driver or a transmitter with
the capability to both receive and send information (such as memory). Transmitters and/or
receivers can operate in either master or slave mode, depending on whether the chip has
to initiate a data transfer or is only addressed. The I
2
C-bus is a multi-master bus; it can be
controlled by more than one bus master connected to it.
The I
2
C-bus implemented in LPC2194 supports a bit rate up to 400 kbit/s (Fast I
2
C-bus).
6.14.1 Features
•
Standard I
2
C-bus compliant interface.
•
Easy to configure as Master, Slave, or Master/Slave.
•
Programmable clocks allow versatile rate control.