Microchip Technology IC PIC MCU PIC18F65J15-I/PT TQFP-64 MCP PIC18F65J15-I/PT 数据表

产品代码

PIC18F65J15-I/PT

PIC18F87J10 FAMILY

DS39663F-page 74

TMR0H

Timer0 Register High Byte

0000 0000

54, 153

TMR0L

Timer0 Register Low Byte

xxxx xxxx

54, 153

T0CON

TMR0ON

T08BIT

T0CS

T0SE

PSA

T0PS2

T0PS1

T0PS0

1111 1111

54, 151

OSCCON

IDLEN

—

OSTS

(5)

—

SCS1

SCS0

0--- q-00

36 , 54

WDTCON

—

SWDTEN

--- ---0

54, 287

RCON

IPEN

—

POR

BOR

0--1 1100

48 , 54,

123

TMR1H

Timer1 Register High Byte

xxxx xxxx

54, 159

TMR1L

Timer1 Register Low Byte

xxxx xxxx

54, 159

T1CON

RD16

T1RUN

T1CKPS1

T1CKPS0

T1OSCEN

T1SYNC

TMR1CS

TMR1ON

0000 0000

54, 155

TMR2

Timer2 Register

0000 0000

54, 162

PR2

Timer2 Period Register

1111 1111

54, 162

T2CON

—

T2OUTPS3 T2OUTPS2 T2OUTPS1 T2OUTPS0

TMR2ON

T2CKPS1

T2CKPS0

-000 0000

54, 161

SSP1BUF

MSSP1 Receive Buffer/Transmit Register

xxxx xxxx

54, 203,

238

SSP1ADD

MSSP1 Address Register (I

C™ Slave mode), MSSP1 Baud Rate Reload Register (I

C Master mode)

0000 0000

54, 203

SSP1STAT

SMP

CKE

D/A

R/W

0000 0000

54, 194,

204

SSP1CON1

WCOL

SSPOV

SSPEN

CKP

SSPM3

SSPM2

SSPM1

SSPM0

0000 0000

54, 195,

204

SSP1CON2

GCEN

ACKSTAT

ACKDT/

ADMSK5

ACKEN/

ADMSK4

RCEN/

ADMSK3

PEN/

ADMSK2

RSEN/

ADMSK1

SEN

0000 0000

54, 206

ADRESH

A/D Result Register High Byte

xxxx xxxx

54, 269

ADRESL

A/D Result Register Low Byte

xxxx xxxx

54, 269

ADCON0

ADCAL

—

CHS3

CHS2

CHS1

CHS0

GO/DONE

ADON

0-00 0000

54, 261

ADCON1

—

VCFG1

VCFG0

PCFG3

PCFG2

PCFG1

PCFG0

--00 0000

54, 262

ADCON2

ADFM

—

ACQT2

ACQT1

ACQT0

ADCS2

ADCS1

ADCS0

0-00 0000

54, 263

CCPR1H

Capture/Compare/PWM Register 1 High Byte

xxxx xxxx

55, 192

CCPR1L

Capture/Compare/PWM Register 1 Low Byte

xxxx xxxx

55, 192

CCP1CON

P1M1 P1M0

DC1B1

DC1B0

CCP1M3

CCP1M2

CCP1M1

CCP1M0

0000 0000

55, 177

CCPR2H

Capture/Compare/PWM Register 2 High Byte

xxxx xxxx

55, 192

CCPR2L

Capture/Compare/PWM Register 2 Low Byte

xxxx xxxx

55, 192

CCP2CON

P2M1

P2M0

DC2B1

DC2B0

CCP2M3

CCP2M2

CCP2M1

CCP2M0

0000 0000

55, 177

CCPR3H

Capture/Compare/PWM Register 1 High Byte

xxxx xxxx

55, 192

CCPR3L

Capture/Compare/PWM Register 1 Low Byte

xxxx xxxx

55, 192

CCP3CON

P3M1

P3M0

DC3B1

DC3B0

CCP3M3

CCP3M2

CCP3M1

CCP3M0

0000 0000

55, 177

ECCP1AS

ECCP1ASE ECCP1AS2 ECCP1AS1 ECCP1AS0

PSS1AC1

PSS1AC0

PSS1BD1

(2)

PSS1BD0

(2)

0000 0000

55, 189

CVRCON

CVREN

CVROE

CVRR

CVRSS

CVR3

CVR2

CVR1

CVR0

0000 0000

55, 277

CMCON

C2OUT

C1OUT

C2INV

C1INV

CIS

CM2

CM1

CM0

0000 0111

55, 271

TMR3H

Timer3 Register High Byte

xxxx xxxx

55, 165

TMR3L

Timer3 Register Low Byte

xxxx xxxx

55, 165

T3CON

RD16

T3CCP2

T3CKPS1

T3CKPS0

T3CCP1

T3SYNC

TMR3CS

TMR3ON

0000 0000

55, 163

PSPCON

IBF

OBF

IBOV

PSPMODE

—

0000 ----

55, 149

SPBRG1

EUSART1 Baud Rate Generator Register Low Byte

0000 0000

55, 243

RCREG1

EUSART1 Receive Register

0000 0000

55, 251,

252

TABLE 6-4:

REGISTER FILE SUMMARY (PIC18F87J10 FAMILY) (CONTINUED)

File Name

Bit 7

Bit 6

Bit 5

Bit 4

Bit 3

Bit 2

Bit 1

Bit 0

Value on

POR, BOR

Details

on page:

Legend:

x = unknown, u = unchanged, - = unimplemented, q = value depends on condition

Note

Bit 21 of the PC is only available in Serial Programming modes.

These bits and/or registers are only available in 80-pin devices; otherwise, they are unimplemented and read as ‘0’. Reset values are

shown for 80-pin devices.

This register and its bits are not implemented in 64-pin devices. In 80-pin devices, the bits are unwritable and read as ‘0’ in Microcontroller

mode.

The PLLEN bit is available only when either ECPLL or HSPLL Oscillator modes are selected; otherwise, the bit is read as ‘0’.

Reset value is ‘0’ when Two-Speed Start-up is enabled and ‘1’ if disabled.