Microchip Technology IC PIC MCU PIC18F65J15-I/PT TQFP-64 MCP PIC18F65J15-I/PT 数据表
产品代码
PIC18F65J15-I/PT
© 2009 Microchip Technology Inc.
DS39663F-page 75
PIC18F87J10 FAMILY
TXREG1
EUSART1 Transmit Register
xxxx xxxx
TXSTA1
CSRC
TX9
TXEN
SYNC
SENDB
BRGH
TRMT
TX9D
0000 0010
RCSTA1
SPEN
RX9
SREN
CREN
ADDEN
FERR
OERR
RX9D
0000 000x
EECON2
Program Memory Control Register 2 (not a physical register)
---- ----
EECON1
—
—
—
FREE
WRERR
WREN
WR
—
---0 x00-
IPR3
SSP2IP
BCL2IP
RC2IP
TX2IP
TMR4IP
CCP5IP
CCP4IP
CCP3IP
1111 1111
PIR3
SSP2IF
BCL2IF
RC2IF
TX2IF
TMR4IF
CCP5IF
CCP4IF
CCP3IF
0000 0000
55, 117
PIE3
SSP2IE
BCL2IE
RC2IE
TX2IE
TMR4IE
CCP5IE
CCP4IE
CCP3IE
0000 0000
IPR2
OSCFIP
CMIP
—
—
BCL1IP
—
TMR3IP
CCP2IP
11-- 1-11
PIR2
OSCFIF
CMIF
—
—
BCL1IF
—
TMR3IF
CCP2IF
00-- 0-00
PIE2
OSCFIE
CMIE
—
—
BCL1IE
—
TMR3IE
CCP2IE
00-- 0-00
IPR1
PSPIP
ADIP
RC1IP
TX1IP
SSP1IP
CCP1IP
TMR2IP
TMR1IP
1111 1111
PIR1
PSPIF
ADIF
RC1IF
TX1IF
SSP1IF
CCP1IF
TMR2IF
TMR1IF
0000 0000
PIE1
PSPIE
ADIE
RC1IE
TX1IE
SSP1IE
CCP1IE
TMR2IE
TMR1IE
0000 0000
MEMCON
(3)
EBDIS
—
WAIT1
WAIT0
—
—
WM1
WM0
0-00 --00
OSCTUNE
—
PLLEN
(4)
—
—
—
—
—
—
-0-- ----
TRISJ
(2)
TRISJ7
TRISJ6
TRISJ5
TRISJ4
TRISJ3
TRISJ2
TRISJ1
TRISJ0
1111 1111
TRISH
(2)
TRISH7
TRISH6
TRISH5
TRISH4
TRISH3
TRISH2
TRISH1
TRISH0
1111 1111
TRISG
—
—
—
TRISG4
TRISG3
TRISG2
TRISG1
TRISG0
---1 1111
TRISF
TRISF7
TRISF6
TRISF5
TRISF4
TRISF3
TRISF2
TRISF1
—
1111 111-
TRISE
TRISE7
TRISE6
TRISE5
TRISE4
TRISE3
TRISE2
TRISE1
TRISE0
1111 1111
TRISD
TRISD7
TRISD6
TRISD5
TRISD4
TRISD3
TRISD2
TRISD1
TRISD0
1111 1111
TRISC
TRISC7
TRISC6
TRISC5
TRISC4
TRISC3
TRISC2
TRISC1
TRISC0
1111 1111
TRISB
TRISB7
TRISB6
TRISB5
TRISB4
TRISB3
TRISB2
TRISB1
TRISB0
1111 1111
TRISA
—
—
TRISA5
TRISA4
TRISA3
TRISA2
TRISA1
TRISA0
--11 1111
LATJ
(2)
LATJ7
LATJ6
LATJ5
LATJ4
LATJ3
LATJ2
LATJ1
LATJ0
xxxx xxxx
LATH
(2)
LATH7
LATH6
LATH5
LATH4
LATH3
LATH2
LATH1
LATH0
xxxx xxxx
LATG
—
—
—
LATG4
LATG3
LATG2
LATG1
LATG0
---x xxxx
LATF
LATF7
LATF6
LATF5
LATF4
LATF3
LATF2
LATF1
—
xxxx xxx-
LATE
LATE7
LATE6
LATE5
LATE4
LATE3
LATE2
LATE1
LATE0
xxxx xxxx
LATD
LATD7
LATD6
LATD5
LATD4
LATD3
LATD2
LATD1
LATD0
xxxx xxxx
LATC
LATC7
LATC6
LATC5
LATC4
LATC3
LATC2
LATC1
LATC0
xxxx xxxx
LATB
LATB7
LATB6
LATB5
LATB4
LATB3
LATB2
LATB1
LATB0
xxxx xxxx
LATA
—
—
LATA5
LATA4
LATA3
LATA2
LATA1
LATA0
--xx xxxx
PORTJ
(2)
RJ7
RJ6
RJ5
RJ4
RJ3
RJ2
RJ1
RJ0
xxxx xxxx
PORTH
(2)
RH7
RH6
RH5
RH4
RH3
RH2
RH1
RH0
0000 xxxx
PORTG
RDPU
REPU
RJPU
(2)
RG4
RG3
RG2
RG1
RG0
111x xxxx
PORTF
RF7
RF6
RF5
RF4
RF3
RF2
RF1
—
x000 000-
PORTE
RE7
RE6
RE5
RE4
RE3
RE2
RE1
RE0
xxxx xxxx
PORTD
RD7
RD6
RD5
RD4
RD3
RD2
RD1
RD0
xxxx xxxx
PORTC
RC7
RC6
RC5
RC4
RC3
RC2
RC1
RC0
xxxx xxxx
PORTB
RB7
RB6
RB5
RB4
RB3
RB2
RB1
RB0
xxxx xxxx
PORTA
—
—
RA5
RA4
RA3
RA2
RA1
RA0
--0x 0000
TABLE 6-4:
REGISTER FILE SUMMARY (PIC18F87J10 FAMILY) (CONTINUED)
File Name
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Value on
POR, BOR
Details
on page:
Legend:
x = unknown, u = unchanged, - = unimplemented, q = value depends on condition
Note
1:
Bit 21 of the PC is only available in Serial Programming modes.
2:
These bits and/or registers are only available in 80-pin devices; otherwise, they are unimplemented and read as ‘0’. Reset values are
shown for 80-pin devices.
3:
This register and its bits are not implemented in 64-pin devices. In 80-pin devices, the bits are unwritable and read as ‘0’ in Microcontroller
mode.
4:
The PLLEN bit is available only when either ECPLL or HSPLL Oscillator modes are selected; otherwise, the bit is read as ‘0’.
5:
Reset value is ‘0’ when Two-Speed Start-up is enabled and ‘1’ if disabled.