Texas Instruments LV32EVK01 Evaluation Kit LV32EVK01/NOPB LV32EVK01/NOPB 数据表

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DS92LV3241/3242 Evaluation Kit Users Manual Version 1.0 
 
JP4,VR1: Pre-Emphasis Feature Selection 
Reference Description 
OPEN 
(floating) 
CLOSED 
(Path to GND) 
 
JP4 
Pre-Emphasis – helps to 
increase the eye pattern 
opening in the LVDS 
streams by providing current 
boost 
Disabled – 
no jumper 
(Default)
 
 
Enabled – 
With jumper 
 
 
 
 
 
 
JP4 & 
VR1
 
Pre-Emphasis adjustment 
(via screw) 
JP1 MUST have a jumper to 
use VR1 potentiometer. 
VR1 = 0
Ω to 20 kΩ, 
JP1 + VR1 + 12 k
Ω 
(
R34) =  
~12 k
Ω (maximum pre-
emphasis) to 
~32 k
Ω (minimum pre-
emphasis*). 
I
PRE
 = [1.2/(R
PRE
)] x 40, 
R
PRE (minimum)
 > 12 k
Ω  
*Note: maximum is based on resistor 
value.  In this case ~32K
Ω
 value is based 
on  the ~12k
Ω
 fixed resistor plus ~20K
Ω
 
maximum potentiometer value.  User can 
use hundreds of k Ohms to reduce the pre-
emphasis value. 
Clockwise 
 
 
increases 
R
PRE
 value 
which 
decreases 
pre-
emphasis 
Counter- 
Clockwise 
 
decreases 
R
PRE
 value 
which 
increases 
pre-
emphasis 
 
 
 
Pre-emphasis user note: 
Pre-emphasis must be adjusted correctly based on application frequency, cable quality, 
cable length, and connector quality.  Maximum pre-emphasis should only be used under 
worse case conditions; for example at the upper frequency specification of the part 
and/or low grade cables at maximum cable lengths.  Typically all that is needed is 
minimum pre-emphasis.  Users should start with no pre-emphasis first and gradually 
apply pre-emphasis until there is clock lock and no data errors.  The best way to monitor 
the pre-emphasis effect is to hook up a differential probe across the AC-coupling 
capacitors for the (+) and (-) inputs of the LVDS channels on the DS92LV3242 Rx demo 
board (NOT across the AC-coupling capacitors for the LVDS channels on the 
DS92LV3241 Tx demo board).
   
 
National Semiconductor Corporation 
 
Date: 9/28/2009 
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