Texas Instruments DM6467 Digital Video Evaluation Module TMDXEVM6467T TMDXEVM6467T 数据表
产品代码
TMDXEVM6467T
1
7
MDCLK
MDIO
(output)
1
4
5
MDCLK
MDIO
(input)
3
3
SPRS605C – JULY 2009 – REVISED JUNE 2012
7.17.2
Management Data Input/Output (MDIO) Electrical Data/Timing
Table 7-79. Timing Requirements for MDIO Input (see
and
)
-1G
NO.
UNIT
MIN
MAX
1
t
c(MDCLK)
Cycle time, MDCLK
400
ns
2
t
w(MDCLK)
Pulse duration, MDCLK high/low
180
ns
3
t
t(MDCLK)
Transition time, MDCLK
5
ns
4
t
su(MDIO-MDCLKH)
Setup time, MDIO data input valid before MDCLK high
10
ns
5
t
h(MDCLKH-MDIO)
Hold time, MDIO data input valid after MDCLK high
0
ns
Figure 7-56. MDIO Input Timing
Table 7-80. Switching Characteristics Over Recommended Operating Conditions for MDIO Output
(see
)
-1G
NO.
PARAMETER
UNIT
MIN
MAX
7
t
d(MDCLKL-MDIO)
Delay time, MDCLK low to MDIO data output valid
100
ns
Figure 7-57. MDIO Output Timing
260
Peripheral Information and Electrical Specifications
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