Microchip Technology DM160218 数据表

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页码 46
 2012-2013 Microchip Technology Inc.
Advance Information
DS40001667C-page 13
MGC3130
4.0
FUNCTIONAL DESCRIPTION
Microchip Technology’s MGC3130 configurable
controller uses up to five E-field receiving electrodes.
Featuring a Signal Processing Unit (SPU), a wide
range of 3D gesture applications are being pre-
processed on the MGC3130, which allows short
development cycles. 
Always-on 3D sensing, even for battery-driven mobile
devices, is enabled due to the chip’s low-power design
and variety of programmable power modes. A Self
Wake-up mode triggers interrupts to the application
host reacting to interaction of a user with the device
and supporting the host system in overall power
reduction.
Featuring a programmable 4-pin digital interface, the
MGC3130 matches a multitude of hardware
requirements. Developers have the choice of data
exchange via I
2
C or SPI. Since the device provides two
I
2
C interfaces, developers have the option to set up a
master-slave architecture between two MGC3130
devices to add an additional sensing area (e.g., Two-
Zone Design) or a single MGC3130 and another circuit
with a corresponding interface, such as a touch screen
controller. 
GestIC sensing electrodes are driven by a low-voltage
signal with a frequency in the range of 100 kHz, which
allows their electrical conductive structure to be made
of any low-cost material. Even the reuse of existing
conductive structures, such as a display’s ITO coating,
is feasible, making the MGC3130 an overall, very cost-
effective system solution.
 provides an overview of the main building
blocks of MGC3130. These blocks will be described in
the following sections.
FIGURE 4-1:
MGC3130 CONTROLLER BLOCK DIAGRAM
Host
Signal 
Processing 
Unit (SPU)
Power Management 
Unit (PMU)
Internal clock
TX Signal Generation
External 
Electrodes
Communication 
control
I
2
C
TM
SPI
MGC3130 
Controller 
Signal 
conditioning
   ADC
Signal 
conditioning
   ADC
Signal 
conditioning
   ADC
Signal 
conditioning
   ADC
Signal 
conditioning
   ADC
FLASH 
memory
IOs
Reset block
Voltage Reference 
(V
REF
)
TXD
RX0
RX1
RX2
RX3
RX4
MCLR
SI0
SI1
SI2
SI3
EIO1
EIO2
EIO3
IS2
EIO0
IN
T
E
R
N
AL
 BU
S
Low-Power 
Wake-up