Microchip Technology MA330020 数据表



2008-2

014 M

rochip

chnology

DS7000

0318G

-page

ds
PIC

33F

J0
6GS101

/X0

d d

PIC33

16GSX02

/X0
4

TABLE 4-14:

INPUT CAPTURE REGISTER MAP FOR dsPIC33FJ16GSX02 AND dsPIC33FJ16GSX04

TABLE 4-16:

OUTPUT COMPARE REGISTER MAP FOR dsPIC33FJ16GSX02 AND dsPIC33FJ06GSX04

File

Name

SFR

Addr

Bit 15

Bit 14

Bit 13

Bit 12

Bit 11

Bit 10

Bit 9

Bit 8

Bit 7

Bit 6

Bit 5

Bit 4

Bit 3

Bit 2

Bit 1

Bit 0

All

Resets

IC1BUF

0140

Input Capture 1 Register

xxxx

IC1CON

0142

—

ICSIDL

—

ICTMR

ICI1

ICI0

ICOV

ICBNE

ICM2

ICM1

ICM0

0000

IC2BUF

0144

Input Capture 2 Register

xxxx

IC2CON

0146

—

ICSIDL

—

ICTMR

ICI1

ICI0

ICOV

ICBNE

ICM2

ICM1

ICM0

0000

Legend:

= unknown value on Reset, — = unimplemented, read as ‘0’. Reset values are shown in hexadecimal.

TABLE 4-15:

OUTPUT COMPARE REGISTER MAP FOR dsPIC33FJ06GS101 AND dsPIC33FJ06GSX02

File

Name

SFR

Addr

Bit 15

Bit 14

Bit 13

Bit 12

Bit 11

Bit 10

Bit 9

Bit 8

Bit 7

Bit 6

Bit 5

Bit 4

Bit 3

Bit 2

Bit 1

Bit 0

All

Resets

OC1RS

0180

Output Compare 1 Secondary Register

xxxx

OC1R

0182

Output Compare 1 Register

xxxx

OC1CON

0184

—

OCSIDL

—

OCFLT

OCTSEL

OCM2

OCM1

OCM0

0000

Legend:

= unknown value on Reset, — = unimplemented, read as ‘0’. Reset values are shown in hexadecimal.

File

Name

SFR

Addr

Bit 15

Bit 14

Bit 13

Bit 12

Bit 11

Bit 10

Bit 9

Bit 8

Bit 7

Bit 6

Bit 5

Bit 4

Bit 3

Bit 2

Bit 1

Bit 0

All

Resets

OC1RS

0180

Output Compare 1 Secondary Register

xxxx

OC1R

0182

Output Compare 1 Register

xxxx

OC1CON

0184

—

OCSIDL

—

OCFLT

OCTSEL

OCM2

OCM1

OCM0

0000

OC2RS

0186

Output Compare 2 Secondary Register

xxxx

OC2R

0188

Output Compare 2 Register

xxxxx

OC2CON

018A

—

OCSIDL

—

OCFLT

OCTSEL

OCM2

OCM1

OCM0

0000

Legend:

= unknown value on Reset, — = unimplemented, read as ‘0’. Reset values are shown in hexadecimal.

TABLE 4-17:

HIGH-SPEED PWM REGISTER MAP

File

Name

SFR

Addr

Bit 15

Bit 14

Bit 13

Bit 12

Bit 11

Bit 10

Bit 9

Bit 8

Bit 7

Bit 6

Bit 5

Bit 4

Bit 3

Bit 2

Bit 1

Bit 0

All

Resets

PTCON

0400

PTEN

—

PTSIDL

SESTAT

SEIEN

EIPU

SYNCPOL

SYNCOEN

SYNCEN

—

SYNCSRC1

SYNCSRC0

SEVTPS3

SEVTPS2

SEVTPS1

SEVTPS0

0000

PTCON2

0402

—

PCLKDIV2 PCLKDIV1 PCLKDIV0

0000

PTPER

0404

PTPER<15:0>

FFF8

SEVTCMP

0406

SEVTCMP<15:3>

—

0000

MDC

040A

MDC<15:0>

0000

Legend:

= unknown value on Reset, — = unimplemented, read as ‘0’. Reset values are shown in hexadecimal.