Microchip Technology DM163025-1 数据表
PIC18(L)F2X/45K50
DS30684A-page 166
2012 Microchip Technology Inc.
13.1
Timer1/3 Operation
The Timer1/3 module is a 16-bit incrementing counter
which is accessed through the TMRxH:TMRxL register
pair. Writes to TMRxH or TMRxL directly update the
counter.
When used with an internal clock source, the module is
a timer and increments on every instruction cycle.
When used with an external clock source, the module
can be used as either a timer or counter and
increments on every selected edge of the external
source.
Timer1/3 is enabled by configuring the TMRxON and
TMRxGE bits in the TxCON and TxGCON registers,
respectively.
which is accessed through the TMRxH:TMRxL register
pair. Writes to TMRxH or TMRxL directly update the
counter.
When used with an internal clock source, the module is
a timer and increments on every instruction cycle.
When used with an external clock source, the module
can be used as either a timer or counter and
increments on every selected edge of the external
source.
Timer1/3 is enabled by configuring the TMRxON and
TMRxGE bits in the TxCON and TxGCON registers,
respectively.
displays the Timer1/3 enable
selections.
13.2
Clock Source Selection
The TMRxCS<1:0> and SOSCEN bits of the TxCON
register are used to select the clock source for Timer1/3.
The dedicated secondary oscillator circuit can be used
as the clock source for Timer1 and Timer3,
simultaneously. Any of the SOSCEN bits will enable the
secondary oscillator circuit and select it as the clock
source for that particular timer.
register are used to select the clock source for Timer1/3.
The dedicated secondary oscillator circuit can be used
as the clock source for Timer1 and Timer3,
simultaneously. Any of the SOSCEN bits will enable the
secondary oscillator circuit and select it as the clock
source for that particular timer.
displays the
clock source selections.
13.2.1
INTERNAL CLOCK SOURCE
When the internal clock source is selected the
TMRxH:TMRxL register pair will increment on multiples
of F
TMRxH:TMRxL register pair will increment on multiples
of F
OSC
as determined by the Timer1/3 prescaler.
When the F
OSC
internal clock source is selected, the
Timer1/3 register value will increment by four counts
every instruction clock cycle. Due to this condition, a
2 LSB error in resolution will occur when reading the
Timer1/3 value. To utilize the full resolution of Timer1/3,
an asynchronous input signal must be used to gate the
Timer1/3 clock input.
The following asynchronous sources may be used:
• Asynchronous event on the TxG pin to Timer1/3
every instruction clock cycle. Due to this condition, a
2 LSB error in resolution will occur when reading the
Timer1/3 value. To utilize the full resolution of Timer1/3,
an asynchronous input signal must be used to gate the
Timer1/3 clock input.
The following asynchronous sources may be used:
• Asynchronous event on the TxG pin to Timer1/3
gate
• C1 or C2 comparator input to Timer1/3 gate
13.2.2
EXTERNAL CLOCK SOURCE
When the external clock source is selected, the Timer1/3
module may work as a timer or a counter.
When enabled to count, Timer1/3 is incremented on the
rising edge of the external clock input of the TxCKI pin.
This external clock source can be synchronized to the
microcontroller system clock or it can run
asynchronously.
When used as a timer with a clock oscillator, an
external 32.768 kHz crystal can be used in conjunction
with the dedicated secondary internal oscillator circuit.
module may work as a timer or a counter.
When enabled to count, Timer1/3 is incremented on the
rising edge of the external clock input of the TxCKI pin.
This external clock source can be synchronized to the
microcontroller system clock or it can run
asynchronously.
When used as a timer with a clock oscillator, an
external 32.768 kHz crystal can be used in conjunction
with the dedicated secondary internal oscillator circuit.
TABLE 13-1:
TIMER1/3 ENABLE
SELECTIONS
SELECTIONS
TMRxON
TMRxGE
Timer1/3
Operation
0
0
Off
0
1
Off
1
0
Always On
1
1
Count Enabled
Note:
In Counter mode, a falling edge must be
registered by the counter prior to the first
incrementing rising edge after any one or
more of the following conditions:
registered by the counter prior to the first
incrementing rising edge after any one or
more of the following conditions:
• Timer1/3 enabled after POR
• Write to TMRxH or TMRxL
• Timer1/3 is disabled
• Timer1/3 is disabled (TMRxON = 0)
• Write to TMRxH or TMRxL
• Timer1/3 is disabled
• Timer1/3 is disabled (TMRxON = 0)
when TxCKI is high then Timer1/3 is
enabled (TMRxON=1) when TxCKI is
low.
enabled (TMRxON=1) when TxCKI is
low.
TABLE 13-2:
CLOCK SOURCE SELECTIONS
TMRxCS1
TMRxCS0
SOSCEN
Clock Source
0
1
x
System Clock (F
OSC
)
0
0
x
Instruction Clock (F
OSC
/4)
1
0
0
External Clocking on TxCKI Pin
1
0
1
Oscillator Circuit on SOSCI/SOSCO Pins