Microchip Technology DM163025-1 数据表

PIC18(L)F2X/45K50

DS30684A-page 90

 2012 Microchip Technology Inc.

FCFh

TMR1H

Holding Register for the Most Significant Byte of the 16-bit TMR1 Register

xxxx xxxx

FCEh

TMR1L

Holding Register for the Least Significant Byte of the 16-bit TMR1 Register

xxxx xxxx

FCDh

T1CON

TMR1CS<1:0>

T1CKPS<1:0>

SOSCEN

T1SYNC

RD16

TMR1ON

0000 0000

FCCh

T1GCON

TMR1GE

T1GPOL

T1GTM

T1GSPM

T1GGO/

DONE

T1GVAL

T1GSS<1:0>

0000 0x00

FCBh

SSP1CON3

ACKTIM

PCIE

SCIE

BOEN

SDAHT

SBCDE

AHEN

DHEN

0000 0000

FCAh

SSP1MSK

SSP1 Mask Register bits

1111 1111

FC9h

SSP1BUF

SSP1 Receive Buffer/Transmit Register

xxxx xxxx

FC8h

SSP1ADD

SSP1 Address Register in I

C Slave Mode. SSP1 Baud Rate Reload Register in I

C Master Mode

0000 0000

FC7h

SSP1STAT

SMP

CKE

D/A

R/W

0000 0000

FC6h

SSP1CON1

WCOL

SSPOV

SSPEN

CKP

SSPM<3:0>

0000 0000

FC5h

SSP1CON2

GCEN

ACKSTAT

ACKDT

ACKEN

RCEN

PEN

RSEN

SEN

0000 0000

FC4h

ADRESH

A/D Result, High Byte

xxxx xxxx

FC3h

ADRESL

A/D Result, Low Byt

xxxx xxxx

FC2h

ADCON0

—

CHS<4:0>

GO/DONE

ADON

-000 0000

FC1h

ADCON1

TRIGSEL

—

PVCFG<1:0>

NVCFG<1:0>

0--- 0000

FC0h

ADCON2

ADFM

—

ACQT<2:0>

ADCS<2:0>

0-00 0000

FBFh

CCPR1H

Capture/Compare/PWM Register 1, High Byte

xxxx xxxx

FBEh

CCPR1L

Capture/Compare/PWM Register 1, Low Byte

xxxx xxxx

FBDh

CCP1CON

P1M<1:0>

DC1B<1:0>

CCP1M<3:0>

0000 0000

FBCh

TMR2

Timer2 Register

0000 0000

FBBh

PR2

Timer2 Period Register

1111 1111

FBAh

T2CON

—

T2OUTPS<3:0>

TMR2ON

T2CKPS<1:0>

-000 0000

FB9h

PSTR1CON

—

STR1SYNC

STR1D

STR1C

STR1B

STR1A

---0 0001

FB8h

BAUDCON1

ABDOVF

RCIDL

RXDTP

TXCKP

BRG16

—

WUE

ABDEN

0100 0-00

FB7h

PWM1CON

P1RSEN

P1DC<6:0>

0000 0000

FB6h

ECCP1AS

ECCP1ASE

ECCP1AS<2:0>

PSS1AC<1:0>

PSS1BD<1:0>

0000 0000

FB5h

ACTCON

ACTEN

ACTUD

—

ACTSRC

ACTLOCK

—

ACTORS

—

00-0 0-0-

FB4h

T3GCON

TMR3GE

T3GPOL

T3GTM

T3GSPM

T3GGO/

DONE

T3GVAL

T3GSS<1:0>

0000 0x00

FB3h

TMR3H

Holding Register for the Most Significant Byte of the 16-bit TMR3 Register

xxxx xxxx

FB2h

TMR3L

Holding Register for the Least Significant Byte of the 16-bit TMR3 Register

xxxx xxxx

FB1h

T3CON

TMR3CS<1:0>

T3CKPS<1:0>

SOSCEN

T3SYNC

RD16

TMR3ON

0000 0000

FB0h

SPBRGH1

EUSART Baud Rate Generator, High Byte

0000 0000

FAFh

SPBRG1

EUSART Baud Rate Generator, Low Byte

0000 0000

FAEh

RCREG1

EUSART Receive Register

0000 0000

FADh

TXREG1

EUSART Transmit Register

0000 0000

FACh

TXSTA1

CSRC

TX9

TXEN

SYNC

SENDB

BRGH

TRMT

TX9D

0000 0010

FABh

RCSTA1

SPEN

RX9

SREN

CREN

ADDEN

FERR

OERR

RX9D

0000 000x

FA9h

EEADR

EEADR<7:0>

0000 0000

FA8h

EEDATA

EEPROM Data Register

0000 0000

FA7h

EECON2

EEPROM Control Register 2 (not a physical register)

---- ----

FA6h

EECON1

EEPGD

CFGS

—

FREE

WRERR

WREN

xx-0 x000

FA5h

IPR3

—

CTMUIP

USBIP

TMR3GIP

TMR1GIP

0000 1111

FA4h

PIR3

—

CTMUIF

USBIF

TMR3GIF

TMR1GIF

0000 0000

FA3h

PIE3

—

CTMUIE

USBIE

TMR3GIE

TMR1GIE

0000 0000

FA2h

IPR2

OSCFIP

C1IP

C2IP

EEIP

BCLIP

HLVDIP

TMR3IP

CCP2IP

1111 1111

FA1h

PIR2

OSCFIF

C1IF

C2IF

EEIF

BCLIF

HLVDIF

TMR3IF

CCP2IF

0000 0000

FA0h

PIE2

OSCFIE

C1IE

C2IE

EEIE

BCLIE

HLVDIE

TMR3IE

CCP2IE

0000 0000

TABLE 6-2:

REGISTER FILE SUMMARY FOR PIC18(L)F2X/45K50 DEVICES (CONTINUED)

Address

Name

Bit 7

Bit 6

Bit 5

Bit 4

Bit 3

Bit 2

Bit 1

Bit 0

Value on

POR, BOR

Legend:

= unknown, u = unchanged, — = unimplemented, q = value depends on condition

Note

PIC18(L)F45K50 devices only.

PIC18(L)F2XK50 devices only.